The VLSI handbook

Preface......Page 6
Editor-in-Chief......Page 8
Contributors......Page 10
Table of Contents......Page 16
Section I. VLSI Technology......Page 24
 Chapter 1. Bipolar Technology......Page 26
 Chapter 2. CMOS/BiCMOS Technology......Page 50
 Chapter 3. Silicon-on-Insulator Technology......Page 88
 Chapter 4. SiGe HBT Technology......Page 112
 Chapter 5. Silicon Carbide Technology......Page 124
 Chapter 6. Passive Components......Page 158
 Chapter 7. Power IC Technologies......Page 170
 Chapter 8. Microelectronics Packaging......Page 200
 Chapter 9. Multichip Module Technologies......Page 226
Section II. Devices and their Models......Page 240
 Chapter 10. Bipolar Junction Transistor Circuits......Page 242
 Chapter 11. RF Passive IC Components......Page 272
 Chapter 12. CMOS Fabrication......Page 294
 Chapter 13. Analog Circuit Simulation......Page 338
 Chapter 14. Interconnect Modeling and Simulation......Page 360
Section III. Low Power Electronics and Design......Page 390
 Chapter 15. System-Level Power Management: An Overview......Page 392
 Chapter 16. Communication-Based Design for Nanoscale SoCs......Page 412
 Chapter 17. Power-Aware Architectural Synthesis......Page 426
 Chapter 18. Dynamic Voltage Scaling for Low-Power Hard Real-Time Systems......Page 448
 Chapter 19. Low Power Microarchitecture Techniques......Page 482
 Chapter 20. Architecture and Design Flow Optimizations for Power-Aware FPGAs......Page 504
 Chapter 21. Technology Scaling and Low-Power Circuit Design......Page 520
Section IV. Amplifiers......Page 546
 Chapter 22. CMOS Amplifier Design......Page 548
 Chapter 23. Bipolar Junction Transistor Amplifiers......Page 588
 Chapter 24. High-Frequency Amplifiers......Page 628
 Chapter 25. Operational Transconductance Amplifiers......Page 676
Section V. Logic Circuits......Page 696
 Chapter 26. Expressions of Logic Functions......Page 698
 Chapter 27. Basic Theory of Logic Functions......Page 704
 Chapter 28. Simplification of Logic Expressions......Page 714
 Chapter 29. Binary Decision Diagrams......Page 726
 Chapter 30. Logic Synthesis with AND and OR Gates in Two Levels......Page 740
 Chapter 31. Sequential Networks......Page 750
 Chapter 32. Logic Synthesis with AND and OR Gates in Multi-Level......Page 770
 Chapter 33. Logic Properties of Transistor Curcuits......Page 776
 Chapter 34. Logic Synthesis with NAND (or NOR) Gates in Multi-Levels......Page 788
 Chapter 35. Logic Synthesis with a Minimum Number of Negative Gates......Page 798
 Chapter 36. Logic Synthesizer with Optimizations in Two Phases......Page 804
 Chapter 37. Logic Synthesizer by the Transduction Method......Page 812
 Chapter 38. Emitter-Coupled Logic......Page 836
 Chapter 39. CMOS......Page 850
 Chapter 40. Pass Transistors......Page 860
 Chapter 41. Adders......Page 872
 Chapter 42. Multipliers......Page 884
 Chapter 43. Dividers......Page 892
 Chapter 44. Full-Custom and Semi-Custom Design......Page 902
 Chapter 45. Programmable Logic Devices......Page 908
 Chapter 46. Gate Arrays......Page 918
 Chapter 47. Field-Programmable Gate Arrays......Page 924
 Chapter 48. Cell-Library Design Approach......Page 934
 Chapter 49. Comparison of Different Design Approaches......Page 938
Section VI. Memory, Registers and Sysem Timing......Page 944
 Chapter 50. System Timing......Page 946
 Chapter 51. ROM/PROM/EPROM......Page 988
 Chapter 52. SRAM......Page 998
 Chapter 53. Embedded Memory......Page 1016
 Chapter 54. Flash Memories......Page 1036
 Chapter 55. Dynamic Random Access Memory......Page 1078
 Chapter 56. Content-Addressable Memory......Page 1096
 Chapter 57. Low-Power Memory Circuits......Page 1114
Section VII. Analog Circuits......Page 1170
 Chapter 58. Nyquist-Rate ADC and DAC......Page 1172
 Chapter 59. Oversampled Analog-to-Digital and Digital-to-Analog Converters......Page 1204
 Chapter 60. RF Communication Circuits......Page 1246
 Chapter 61. PLL Circuits......Page 1278
 Chapter 62. Switched-Capacitor Filters......Page 1312
Section VIII. Microprocessor and ASIC......Page 1352
 Chapter 63. Timing and Signal Integrity Analysis......Page 1354
 Chapter 64. Microprocessor Design Verification......Page 1386
 Chapter 65. Microprocessor Layout Method......Page 1402
 Chapter 66. Architecture......Page 1430
 Chapter 67. Logic Synthesis for Field Programmable Gate Array (FPGA) Technology......Page 1454
Section IX. Testing of Digital Systems......Page 1472
 Chapter 68. CAD DFT and Test Architectures......Page 1474
 Chapter 69. Automatic Test Pattern Generation......Page 1486
 Chapter 70. Built-In Self-Test......Page 1504
Section X. Compound Semiconductor Integrated Circuit Technology......Page 1512
 Chapter 71. Compound Semiconductor Materials......Page 1514
 Chapter 72. Compound Semiconductor Devices for Analog and Digital Circuits......Page 1526
 Chapter 73. Compound Semiconductor RF Circuits......Page 1558
 Chapter 74. High-Speed Circuit Design Principles......Page 1606
Section XI. Design Automation......Page 1630
 Chapter 75. Internet-Based Micro-Electronic Design Automation (IMEDA) Framework......Page 1632
 Chapter 76. System-Level Design......Page 1664
 Chapter 77. Performance Modeling and Analysis Using VHDL and SystemC......Page 1684
 Chapter 78. Embedded Computing Systems and Hardware/Software Co-Design......Page 1750
 Chapter 79. Design Automation Technology Roadmap......Page 1760
Section XII. VLSI Signal Processing......Page 1800
 Chapter 80. Computer Arithmetic for VLSI Signal Processing......Page 1804
 Chapter 81. VLSI Architectures for JPEG 2000 EBCOT: Design Techniques and Challenges......Page 1828
 Chapter 82. VLSI Architectures for Foreward Error-Control Decoders......Page 1854
 Chapter 83. An Exploration of Hardware Architectures for Face Detection......Page 1888
 Chapter 84. Multidimensional Logarithmic Number System......Page 1916
Section XIII. Design Languages......Page 1952
 Chapter 85. Languages for Design and Implementation of Hardware......Page 1954
 Chapter 86. System Level Design Languages......Page 1960
 Chapter 87. RT Level Hardware Description with VHDL......Page 2042
 Chapter 88. Register Transfer Level Hardware Description with Verilog......Page 2070
 Chapter 89. Register-Transfer Level Hardware Description with SystemC......Page 2102
 Chapter 90. System Verilog......Page 2134
 Chapter 91. VHDL-AMS Hardware Description Language......Page 2160
 Chapter 92. Verification Languages......Page 2176
 Chapter 93. ASIC and Custom IC Cell Information Representation......Page 2200
 Chapter 94. Test Languages......Page 2222
 Chapter 95. Timing Description Languages......Page 2250
 Chapter 96. HDL-Based Tools and Environments......Page 2268
Index......Page 2278