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دانلود کتاب Write Great Code 2 Thinking Low-Level, Writing High-Level

دانلود کتاب کد عالی 2 را بنویسید با تفکر در سطح پایین، نوشتن در سطح بالا

Write Great Code 2 Thinking Low-Level, Writing High-Level

مشخصات کتاب

Write Great Code 2 Thinking Low-Level, Writing High-Level

ویرایش:  
نویسندگان:   
سری:  
ISBN (شابک) : 1593270038 
ناشر: No Starch 
سال نشر: 2006 
تعداد صفحات: 619 
زبان: english 
فرمت فایل : PDF (درصورت درخواست کاربر به PDF، EPUB یا AZW3 تبدیل می شود) 
حجم فایل: 2 مگابایت 

قیمت کتاب (تومان) : 48,000



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توضیحاتی درمورد کتاب به خارجی

Provides information on how computer systems operate, how compilers work, and writing source code.



فهرست مطالب

Brief Contents
Contents
Acknowledgments
Chapter 1: What You Need to Know to Write Great Code
	The Write Great Code Series
	What This Book Covers
	Assumptions This Book Makes
	Characteristics of Great Code
	The Environment for This Book
	Additional Tips
	For More Information
Chapter 2: Numeric Representation
	What Is a Number?
	Numbering Systems
		The Decimal Positional Numbering System
		Radix (Base) Values
		The Binary Numbering System
		The Hexadecimal Numbering System
		The Octal Numbering System
	Numeric/String Conversions
	Internal Numeric Representation
		Bits
		Bit Strings
	Signed and Unsigned Numbers
	Useful Properties of Binary Numbers
	Sign Extension, Zero Extension, and Contraction
	Saturation
	Binary-Coded Decimal Representation
	Fixed-Point Representation
	Scaled Numeric Formats
	Rational Representation
	For More Information
Chapter 3: Binary Arithmetic and Bit Operations
	Arithmetic Operations on Binary and Hexadecimal Numbers
		Adding Binary Values
		Subtracting Binary Values
		Multiplying Binary Values
		Dividing Binary Values
	Logical Operations on Bits
	Logical Operations on Binary Numbers and Bit Strings
	Useful Bit Operations
		Testing Bits in a Bit String Using AND
		Testing a Set of Bits for Zero/Not Zero Using AND
		Comparing a Set of Bits Within a Binary String
		Creating Modulo-n Counters Using AND
	Shifts and Rotates
	Bit Fields and Packed Data
	Packing and Unpacking Data
	For More Information
Chapter 4: Floating-Point Representation
	Introduction to Floating-Point Arithmetic
	IEEE Floating-Point Formats
		Single-Precision Floating-Point Format
		Double-Precision Floating-Point Format
		Extended-Precision Floating-Point Format
		Quad-Precision Floating-Point Format
	Normalization and Denormalized Values
	Rounding
	Special Floating-Point Values
	Floating-Point Exceptions
	Floating-Point Operations
		Floating-Point Representation
		Floating-Point Addition and Subtraction
		Floating-Point Multiplication and Division
	For More Information
Chapter 5: Character Representation
	Character Data
		The ASCII Character Set
		The EBCDIC Character Set
		Double-Byte Character Sets
		The Unicode Character Set
		Unicode Code Points
		Unicode Code Planes
		Surrogate Code Points
		Glyphs, Characters, and Grapheme Clusters
		Unicode Normals and Canonical Equivalence
		Unicode Encodings
		Unicode Combining Characters
	Character Strings
		Character String Formats
		Types of Strings: Static, Pseudo-Dynamic, and Dynamic
		Reference Counting for Strings
		Delphi Strings
		Custom String Formats
	Character Set Data Types
		Powerset Representation of Character Sets
		List Representation of Character Sets
	Designing Your Own Character Set
		Designing an Efficient Character Set
		Grouping the Character Codes for Numeric Digits
		Grouping Alphabetic Characters
		Comparing Alphabetic Characters
		Grouping Other Characters
	For More Information
Chapter 6: Memory Organization and Access
	The Basic System Components
		The System Bus
	Physical Organization of Memory
		8-Bit Data Buses
		16-Bit Data Buses
		32-Bit Data Buses
		64-Bit Data Buses
		Small Accesses on Non-80x86 Processors
	Big-Endian vs. Little-Endian Organization
	The System Clock
		Memory Access and the System Clock
		Wait States
		Cache Memory
	CPU Memory Access
		The Direct Memory Addressing Mode
		The Indirect Addressing Mode
		The Indexed Addressing Mode
		The Scaled-Index Addressing Modes
	For More Information
Chapter 7: Composite Data Types and Memory Objects
	Pointer Types
		Pointer Implementation
		Pointers and Dynamic Memory Allocation
		Pointer Operations and Pointer Arithmetic
	Arrays
		Array Declarations
		Array Representation in Memory
		Accessing Elements of an Array
		Multidimensional Arrays
	Records/Structures
		Records in Pascal/Delphi
		Records in C/C++
		Records in HLA
		Records (Tuples) in Swift
		Memory Storage of Records
	Discriminant Unions
		Unions in C/C++
		Unions in Pascal/Delphi
		Unions in Swift
		Unions in HLA
		Memory Storage of Unions
		Other Uses of Unions
	Classes
		Inheritance
		Class Constructors
		Polymorphism
		Abstract Methods and Abstract Base Classes
	Classes in C++
		Abstract Member Functions and Classes in C++
		Multiple Inheritance in C++
	Classes in Java
	Classes in Swift
	Protocols and Interfaces
	Generics and Templates
	For More Information
Chapter 8: Boolean Logic and Digital Design
	Boolean Algebra
		The Boolean Operators
		Boolean Postulates
		Boolean Operator Precedence
	Boolean Functions and Truth Tables
	Function Numbers
	Algebraic Manipulation of Boolean Expressions
	Canonical Forms
		Sum-of-Minterms Canonical Form and Truth Tables
		Algebraically Derived Sum-of-Minterms Canonical Form
		Product-of-Maxterms Canonical Form
	Simplification of Boolean Functions
	What Does This Have to Do with Computers, Anyway?
		Correspondence Between Electronic Circuits and Boolean Functions
		Combinatorial Circuits
		Sequential and Clocked Logic
	For More Information
Chapter 9: CPU Architecture
	Basic CPU Design
	Decoding and Executing Instructions: Random Logic vs. Microcode
	Executing Instructions, Step by Step
		The mov Instruction
		The add Instruction
		The jnz Instruction
		The loop Instruction
	RISC vs. CISC: Improving Performance by Executing More, Faster, Instructions
	Parallelism: The Key to Faster Processing
		Functional Units
		The Prefetch Queue
		Conditions That Hinder the Performance of the Prefetch Queue
		Pipelining: Overlapping the Execution of Multiple Instructions
		Instruction Caches: Providing Multiple Paths to Memory
		Pipeline Hazards
		Superscalar Operation: Executing Instructions in Parallel
		Out-of-Order Execution
		Register Renaming
		VLIW Architecture
		Parallel Processing
		Multiprocessing
	For More Information
Chapter 10: Instruction Set Architecture
	The Importance of Instruction Set Design
	Basic Instruction Design Goals
		Choosing Opcode Length
		Planning for the Future
		Choosing Instructions
		Assigning Opcodes to Instructions
	The Y86 Hypothetical Processor
		Y86 Limitations
		Y86 Instructions
		Operand Types and Addressing Modes on the Y86
		Encoding Y86 Instructions
		Examples of Encoding Y86 Instructions
		Extending the Y86 Instruction Set
	Encoding 80x86 Instructions
		Encoding Instruction Operands
		Encoding the add Instruction
		Encoding Immediate (Constant) Operands on the x86
		Encoding 8-, 16-, and 32-Bit Operands
		Encoding 64-Bit Operands
		Alternate Encodings for Instructions
	Implications of Instruction Set Design to the Programmer
	For More Information
Chapter 11: Memory Architecture and Organization
	The Memory Hierarchy
	How the Memory Hierarchy Operates
	Relative Performance of Memory Subsystems
	Cache Architecture
		Direct-Mapped Cache
		Fully Associative Cache
		n-Way Set Associative Cache
		Cache-Line Replacement Policies
		Cache Write Policies
		Cache Use and Software
	NUMA and Peripheral Devices
	Virtual Memory, Memory Protection, and Paging
	Writing Software That Is Cognizant of the Memory Hierarchy
	Runtime Memory Organization
		Static and Dynamic Objects, Binding, and Lifetime
		The Code, Read-Only, and Constant Sections
		The Static Variables Section
		The Storage Variables Section
		The Stack Section
		The Heap Section and Dynamic Memory Allocation
	For More Information
Chapter 12: Input and Output
	Connecting a CPU to the Outside World
	Other Ways to Connect Ports to the System
	I/O Mechanisms
		Memory-Mapped I/O
		I/O-Mapped Input/Output
		Direct Memory Access
	I/O Speed Hierarchy
	System Buses and Data Transfer Rates
		Performance of the PCI Bus
		Performance of the ISA Bus
		The AGP Bus
	Buffering
	Handshaking
	Timeouts on an I/O Port
	Interrupts and Polled I/O
	Protected-Mode Operation and Device Drivers
		The Device Driver Model
		Communication with Device Drivers
	For More Information
Chapter 13: Computer Peripheral Buses
	The Small Computer System Interface
		Limitations
		Improvements
		SCSI Protocol
		SCSI Advantages
	The IDE/ATA Interface
		The SATA Interface
		Fibre Channel
	The Universal Serial Bus
		USB Design
		USB Performance
		Types of USB Transmissions
		USB-C
		USB Device Drivers
	For More Information
Chapter 14: Mass Storage Devices and Filesystems
	Disk Drives
		Floppy Disk Drives
		Hard Drives
		RAID Systems
		Optical Drives
		CD, DVD, and Blu-ray Drives
	Tape Drives
	Flash Storage
	RAM Disks
	Solid-State Drives
	Hybrid Drives
	Filesystems on Mass Storage Devices
		Sequential Filesystems
		Efficient File Allocation Strategies
	Writing Software That Manipulates Data on a Mass Storage Device
		File Access Performance
		Synchronous and Asynchronous I/O
		The Implications of I/O Type
		Memory-Mapped Files
	For More Information
Chapter 15: Miscellaneous Input and Output Devices
	Exploring Specific PC Peripheral Devices
		The Keyboard
		The Standard PC Parallel Port
		Serial Ports
	Mice, Trackpads, and Other Pointing Devices
	Joysticks and Game Controllers
	Sound Cards
		How Audio Interface Peripherals Produce Sound
		The Audio and MIDI File Formats
		Programming Audio Devices
	For More Information
Afterword: Thinking Low-Level, Writing High-Level
Appendix A: ASCII Character Set
Glossary
Index




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