Thin-Film Transistors

Thin-Film Transistors......Page 1
Preface......Page 3
Contributors......Page 10
Contents......Page 8
1.1 INTRODUCTION......Page 12
Contents......Page 0
1.2 THE 1930s......Page 13
1.3 THE 1940s......Page 14
1.4 THE 1950s......Page 15
1.5 THE 1960s......Page 16
1.6 THE 1970s......Page 23
1.7 THE 1980s......Page 27
1.8 THE 1990s......Page 39
REFERENCES......Page 42
2.1 INTRODUCTION TO THE HYDROGENATED AMORPHOUS SILICON THIN- FILM TRANSISTOR......Page 46
2.2.1 Linear Region......Page 48
2.2.2 Saturation Region......Page 49
2.3.1 Inverted-Staggered Hydrogenated Amorphous Silicon Thin-Film Transistor......Page 54
2.3.2 Staggered Thin- Film Transistor Structure......Page 59
2.3.3 Short- Channel Hydrogenated Amorphous Silicon Thin- Film Transistor......Page 60
2.3.4 Coplanar Thin- Film Transistor......Page 61
2.4.1 Deposition of Hydrogenated Amorphous Silicon by PECVD......Page 63
2.4.2 Deposition of SiNx by PECVD......Page 66
2.4.4 Interface Improvements......Page 68
2.5.1 Low- Temperature Deposition......Page 70
2.5.2 Gas- Barrier Films for Plastic Substrates......Page 71
2.5.3 Stress Effects......Page 72
REFERENCES......Page 76
3.1 MOTIVATION......Page 81
3.2 NUMERICAL SIMULATION OF AMORPHOUS SILICON THIN- FILM TRANSISTORS......Page 82
3.2.1 Simulation Model......Page 83
3.2.1.1 Boundary Conditions......Page 85
3.2.1.2 Amorphous Silicon Density- of- States Model......Page 86
3.2.1.3 Source and Drain Contact Resistances......Page 88
3.2.2 Temperature Effect on Amorphous Silicon Thin- Film Transistors......Page 90
3.2.3 Amorphous Silicon Thin- Film Transistors Under Illumination......Page 91
3.3.1 Normalization of Thin-Film Transistor Characteristics......Page 94
3.3.2 Extraction of Thin- Film Transistor Electrical Parameters......Page 95
3.3.3 Thin- Film Transistor Source/ Drain Series Resistances......Page 98
3.3.4.1 Device Structure......Page 104
3.3.4.2 Bidimensional Numerical Simulation of Amorphous Silicon Gated Four- Probe Thin- Film Transistors......Page 105
3.3.5 Amorphous Silicon Thickness Effects......Page 109
3.3.6 Amorphous Silicon Thin- Film Transistor Under Illumination......Page 114
3.4.1 High-Performance Back-Channel-Etched Hydrogenated Amorphous Silicon Thin-Film Transistors......Page 116
3.4.2.1 Gate-Planarized Device Structure and Fabrication Process......Page 119
3.4.2.2 Gate-Planarized Thin-Film Transistor Electrical Performance......Page 121
3.4.3.1 Buried-Busline Device Structure and Fabrication Process......Page 122
3.4.3.2 Buried-Busline Device Electrical Performance......Page 124
3.4.4.1 Fully Self-Aligned Back-Channel-Etched Thin-Film Transistor Structure......Page 126
3.4.4.2 Fully Self-Aligned Back-Channel-Etched Thin-Film Transistor Electrical Performance......Page 127
3.4.5.1 Device Structure and Fabrication Process......Page 128
3.4.5.2 Electrical Performance......Page 130
3.5 ELECTRICAL INSTABILITIES IN HYDROGENATED AMORPHOUS SILICON THIN- FILM TRANSISTORS......Page 131
ACKNOWLEDGMENTS......Page 141
REFERENCES......Page 142
4.1 INTRODUCTION......Page 149
4.2 OVERVIEW OF AMLCDs AND LOW- TEMPERATURE POLYSILICON TFT LCDs: PRINCIPLES AND TYPES OF ADDRESSABLE TWISTED NORMATIC LCD LIGHT VALVES......Page 150
4.2.1 Driver Requirements......Page 152
4.2.2 Pixel Thin- Film Transistor Requirements......Page 158
4.3 METHODS FOR DEPOSITING THIN SILICON FILMS......Page 159
4.4.1 Solid- Phase Crystallization Process......Page 168
4.4.2 Excimer Laser Crystallization ( ELC)......Page 178
4.4.3 Trends in Crystallization Technology......Page 189
4.5 GATE INSULATOR FORMATION......Page 191
4.6 DOPING/ ACTIVATION......Page 197
4.7 TYPICAL POLYSILICON TFT FABRICATION FLOW......Page 206
REFERENCES......Page 210
5.1 ACTIVE- MATRIX DESIGN AND FABRICATION......Page 218
5.1.1 AMLCD Array Requirements and TFT Specifications......Page 223
5.1.2 Storage Capacitor Pixel Configurations......Page 258
5.1.3 Electrical Overstress/ Electrostatic Discharge ( EOS/ ESD) Protection......Page 261
5.1.4 Active- Matrix Array Testing......Page 265
5.1.5 Good TFT Array Yield......Page 273
5.2.1 TFT Active-Matrix Driving Schemes......Page 277
5.2.2 Display Driver Chips......Page 293
5.2.3 Integrated Drivers and Functions......Page 295
5.2.4 System Electronics......Page 296
5.3 STATE- OF- THE- ART HIGH- RESOLUTION HIGHPERFORMANCE LARGE- AREA AMLCDs......Page 297
REFERENCES......Page 303
6.1 INTRODUCTION......Page 309
6.2 BASIC PRINCIPLES AND MODE OF OPERATION......Page 312
6.3 SCOPE AND LIMITS OF ORGANIC SEMICONDUCTORS......Page 317
6.4 DEVICES, MATERIALS, AND RESULTS......Page 319
6.4.2 Vacuum Evaporation of Oligothiophenes, Pentacene, and other Small Molecules......Page 320
6.4.4 Solution- Processed Polyalkylthiophenes......Page 329
6.4.5 All- Organic Devices Fabricated via Printing Techniques......Page 331
6.4.7 Effect of the Insulator on the Carrier Mobility......Page 333
6.5 CONCLUSION......Page 334
REFERENCES......Page 335
7.1 INTRODUCTION......Page 340
7.2 OTFT FABRICATION METHODS USING VACUUM SUBLIMATION OF ORGANIC MOLECULES......Page 342
7.3 CHARGE TRANSPORT MECHANISMS IN SMALLMOLECULE ORGANIC SEMICONDUCTORS......Page 345
7.4 ORGANIC TRANSISTOR OPERATION AND MODELING......Page 348
7.5.1 Progress in Performance of p-Type OTFTs......Page 352
7.5.2 Relation Between Morphology and Electrical Properties......Page 355
7.5.3 Dependence of Mobility on Gate Voltage......Page 359
7.5.4 Effects of Device Configuration on Pentacene Transistor Performance......Page 362
7.5.5 Progress in Performance of......Page 365
7.6 CONCLUSIONS AND OUTLOOK......Page 374
REFERENCES......Page 375
8.1 INTRODUCTION......Page 383
8.2 ORGANIC SEMICONDUCTORS......Page 385
8.2.1 Linear Fused Rings......Page 387
8.2.2 Two- Dimensional Fused- Ring Compounds......Page 390
8.2.3 Polymeric Semiconductors......Page 392
8.3 INTERLAYER DIELECTRICS......Page 394
8.4 PATTERNING TECHNIQUES......Page 396
8.4.1 Screen Printing......Page 397
8.4.2 Micromolding in Capillaries......Page 399
8.4.3 Microcontact Printing......Page 403
8.4.4 Near- Field Photolithography......Page 405
8.5.1 Electronic Paper-like Displays......Page 406
8.5.2.1 Background......Page 415
8.5.2.2 Complementary Circuits......Page 418
8.6 CONCLUSIONS......Page 424
REFERENCES......Page 425
9.1 INTRODUCTION......Page 432
9.2 HISTORICAL OVERVIEW......Page 433
9.3 DEVICE PHYSICS......Page 436
9.4 MOBILITY ENHANCEMENT THROUGH POLYMER SELF- ORGANIZATION......Page 446
9.5 DIRECT INKJET PRINTING OF POLYMER TRANSISTOR CIRCUITS......Page 455
9.6 APPLICATIONS......Page 464
9.6.1 Active- Matrix Displays......Page 466
9.6.2 Identification Tags......Page 468
9.6.3 ALL- POLYMER OPTOELECTRONIC INTEGRATED CIRCUITS......Page 469
9.7 CONCLUSIONS......Page 472
REFERENCES......Page 473
10.1 INTRODUCTION......Page 479
10.2 HYBRID PEROVSKITES......Page 482
10.3.1 Solution Processing......Page 489
10.3.2 Intercalation Reactions......Page 491
10.3.3 Thermal Evaporation......Page 494
10.3.4 Patterning......Page 498
10.4 THIN- FILM TRANSISTORS......Page 501
10.5 CONCLUSIONS......Page 512
REFERENCES......Page 513