Silicon-Based High-Sensitivity Broadband Receiver

Acknowledgements
Contents
About the Author
Abbreviations and Acronyms
1 Background of High-Sensitivity Receiver
	1.1 High-Sensitivity Receiver in Wireless Systems
		1.1.1 Radiometer
		1.1.2 Communication Systems
	1.2 High-Sensitivity Optoelectronic Receiver in Wired Systems
	1.3 Advantages and Limitations of Silicon-Based Technology
	1.4 Summary
	References
2 Silicon Device Limitations
	2.1 Passive Devices
		2.1.1 Loss Mechanism of Passives
		2.1.2 Transmission Line
		2.1.3 Inductor
		2.1.4 Capacitor
		2.1.5 Transformer
	2.2 Active Devices
		2.2.1 Transistor Model
		2.2.2 fT/fmax
		2.2.3 Noise
	2.3 Summary
	References
3 High-Sensitivity Radiometer Architecture
	3.1 Radiometer Principles
	3.2 Typical Radiometer Architectures
		3.2.1 Total Power Radiometer
		3.2.2 Dicke Radiometer
		3.2.3 Null-Balance Radiometer
		3.2.4 Pulse Noise Injection Radiometer
	3.3 Summary
	References
4 High Sensitivity W-Band Radiometer
	4.1 Comparison Between the Conventional Dicke Architecture and the Proposed Radiometer
	4.2 Proposed SPDT-DA Design
		4.2.1 Operation Principle of the Proposed SPDT-DA
		4.2.2 Design Considerations of the SPDT-DA Switching TLs
	4.3 Proposed Receiver Design
		4.3.1 LNA Design
		4.3.2 Detector Design
		4.3.3 Receiver Design
	4.4 Experimental Results of the Radiometer
		4.4.1 SPDT-DA
		4.4.2 LNA
		4.4.3 Detector
		4.4.4 Receiver Performance
		4.4.5 Imaging Testing Experiment
	4.5 Conclusion
	References
5 Interstage Reflectionless Radiometer
	5.1 Conventional Radiometer Architectures with Interstage Absorptivity
		5.1.1 Radiometer Based on Circulator
		5.1.2 Radiometer Based on Attenuator
		5.1.3 Radiometer Based on Quadrature Couplers
	5.2 Radiometer with Reflectionless Matching Network
		5.2.1 Architecture of the Reflectionless Radiometer
		5.2.2 Structure of the Proposed RLMN
		5.2.3 Transmission Poles Introduced by RLMN
	5.3 Enhanced Performance of Radiometer with Reflectionless Matching Network
		5.3.1 Stability Improvement
		5.3.2 Linearity Enhancement Analysis
		5.3.3 Conversion Gain Analysis
		5.3.4 Noise Figure Analysis
	5.4 Design of V-Band Radiometer
		5.4.1 Low Noise Amplifier with RLMN
		5.4.2 Mixer Design
	5.5 Experimental Results of the Proposed Radiometer
		5.5.1 Reflectionless LNA
		5.5.2 Radiometer Performance
	5.6 Summary
	References
6 A Dual-Band Radiometer Utilizing a Distributed Active Hot- and Cold-Load
	6.1 Architecture of the L- and C-Band Radiometer
	6.2 Wideband AHCL Design
		6.2.1 Wideband Distributed Noise-Generation Network
		6.2.2 Working Mechanism of the Active Cold-Load
		6.2.3 Working Mechanism of the Active Hot-Load
		6.2.4 Implementation and Measurement Results
	6.3 Dual-Band Radiometer
		6.3.1 Dual-Band Reflectionless SPDT Switch
		6.3.2 Wideband Low-Noise Amplifier
		6.3.3 Dual-Band Reflectionless Bandpass Filter
		6.3.4 Diplexer
		6.3.5 L- and C-Band Detectors Design
	6.4 Implementation and Measurement Results
		6.4.1 Responsivity Measurement
		6.4.2 Thermal Sensitivity and NETD Measurements
	6.5 Summary
	References
7  High Sensitivity Optical Receiver Architecture
	7.1 Noise Analysis of the TIA
	7.2 The Basic Noise Analysis
	7.3 The Frequency Response Analysis
	7.4 Influence of Gain Tuning
	7.5 Trade-Off in Noise Performance
	7.6 The CMOS Implementation of TIA
	7.7 The BJT Implementation of TIA
	7.8 Comparison of the MOS and BJT Implementation
	7.9 Summary
	References
8 Ultra-Large Dynamic Range CMOS Transimpedance Amplifier
	8.1 Introduction
	8.2 PrA with the Three Controlled Current Paths
		8.2.1 Amplifying Stage of the PrA
		8.2.2 Three Current Bleeding Paths in the PrA
		8.2.3 Gain Tuning Mechanisms in the Controlled Current Paths
		8.2.4 Noise Performance of the PrA
		8.2.5 Non-linearity of the PrA
	8.3 TIA Design
		8.3.1 AGC Circuit
		8.3.2 Other Wideband Blocks: VGA, PoA and Buffer
		8.3.3 Other Analog Blocks: DCOC with OPAMP, BGR, LDO
	8.4 Experimental Results
	8.5 Summary
	References
9 High Sensitivity and Dynamic-Range 25 GBaud Silicon Receiver
	9.1 Background
	9.2 Current-Controlled DC Adjustment Path
		9.2.1 Structure of the DC Adjustment Path
		9.2.2 Sensitivity
		9.2.3 Dynamic Range and Linearity
		9.2.4 Bandwidth
	9.3 25 GBaud Differential Receiver Design
		9.3.1 TIA Core Circuit
		9.3.2 Post Amplifier
		9.3.3 Buffer Stage
	9.4 Experimental Results
	9.5 Summary
	References
10 Summary and Conclusions