مشخصات کتاب

Reconfigurable and adaptive computing : theory and applications

ویرایش:  
نویسندگان: Nedjah. Nadia  
سری:  
ISBN (شابک) : 9781498731768, 1498731767 
ناشر: CRC Press 
سال نشر: 2016 
تعداد صفحات: 246 
زبان: English 
فرمت فایل : PDF (درصورت درخواست کاربر به PDF، EPUB یا AZW3 تبدیل می شود) 
حجم فایل: 11 مگابایت 

کلمات کلیدی مربوط به کتاب محاسبات قابل تنظیم و تطبیق پذیر: نظریه و کاربردها: سیستم های محاسباتی تطبیقی معماری کامپیوتر. کامپیوتر / سواد کامپیوتر کامپیوتر / علوم کامپیوتر کامپیوتر / کامپیوتر پردازش داده ها / سخت افزار / کامپیوترهای عمومی / فناوری اطلاعات کامپیوتر / تئوری ماشین کامپیوتر / مرجع

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توجه داشته باشید کتاب محاسبات قابل تنظیم و تطبیق پذیر: نظریه و کاربردها نسخه زبان اصلی می باشد و کتاب ترجمه شده به فارسی نمی باشد. وبسایت اینترنشنال لایبرری ارائه دهنده کتاب های زبان اصلی می باشد و هیچ گونه کتاب ترجمه شده یا نوشته شده به فارسی را ارائه نمی دهد.

توضیحاتی در مورد کتاب محاسبات قابل تنظیم و تطبیق پذیر: نظریه و کاربردها

توضیحاتی درمورد کتاب به خارجی

Reconfigurable computing techniques and adaptive systems are some of the most promising architectures for microprocessors. Reconfigurable and Adaptive Computing: Theory and Applications explores the latest research activities on hardware architecture for Reconfigurable computing techniques and adaptive systems are some of the most promising architectures for microprocessors. Reconfigurable and Adaptive Computing: Theory and Applications explores the latest research activities on hardware architecture for reconfigurable and adaptive computing systems. The first section of the book covers reconfigurable systems. The book presents a software and hardware codesign flow for coarse-grained systems-on-chip, a video watermarking algorithm for the H.264 standard, a solution for regular expressions matching systems, and a novel field programmable gate array (FPGA)-based acceleration solution with MapReduce framework on multiple hardware accelerators. The second section discusses network-on-chip, including an implementation of a multiprocessor system-on-chip platform with shared memory access, end-to-end quality-of-service metrics modeling based on a multi-application environment in network-on-chip, and a 3D ant colony routing (3D-ACR) for network-on-chip with three different 3D topologies. The final section addresses the methodology of system codesign. The book introduces a new software-hardware codesign flow for embedded systems that models both processors and intellectual property cores as services. It also proposes an efficient algorithm for dependent task software-hardware codesign with the greedy partitioning and insert scheduling method (GPISM) by task graph. and adaptive computing systems. The first section of the book covers reconfigurable systems. The book presents a software and hardware codesign flow for coarse-grained systems-on-chip, a video watermarking algorithm for the H.264 standard, a solution for regular expressions matching systems, and a novel field programmable gate array (FPGA)-based acceleration solution with MapReduce framework on multiple hardware accelerators. The second section discusses network-on-chip, including an implementation of a multiprocessor system-on-chip platform with shared memory access, end-to-end quality-of-service metrics modeling based on a multi-application environment in network-on-chip, and a 3D ant colony routing (3D-ACR) for network-on-chip with three different 3D topologies. The final section addresses the methodology of system codesign. The book introduces a new software-hardware codesign flow for embedded systems that models both processors and intellectual property cores as services. It also proposes an efficient algorithm for dependent task software-hardware codesign with the greedy partitioning and insert scheduling method (GPISM) by task graph. Read more...
Abstract: Reconfigurable computing techniques and adaptive systems are some of the most promising architectures for microprocessors. Reconfigurable and Adaptive Computing: Theory and Applications explores the latest research activities on hardware architecture for Reconfigurable computing techniques and adaptive systems are some of the most promising architectures for microprocessors. Reconfigurable and Adaptive Computing: Theory and Applications explores the latest research activities on hardware architecture for reconfigurable and adaptive computing systems. The first section of the book covers reconfigurable systems. The book presents a software and hardware codesign flow for coarse-grained systems-on-chip, a video watermarking algorithm for the H.264 standard, a solution for regular expressions matching systems, and a novel field programmable gate array (FPGA)-based acceleration solution with MapReduce framework on multiple hardware accelerators. The second section discusses network-on-chip, including an implementation of a multiprocessor system-on-chip platform with shared memory access, end-to-end quality-of-service metrics modeling based on a multi-application environment in network-on-chip, and a 3D ant colony routing (3D-ACR) for network-on-chip with three different 3D topologies. The final section addresses the methodology of system codesign. The book introduces a new software-hardware codesign flow for embedded systems that models both processors and intellectual property cores as services. It also proposes an efficient algorithm for dependent task software-hardware codesign with the greedy partitioning and insert scheduling method (GPISM) by task graph. and adaptive computing systems. The first section of the book covers reconfigurable systems. The book presents a software and hardware codesign flow for coarse-grained systems-on-chip, a video watermarking algorithm for the H.264 standard, a solution for regular expressions matching systems, and a novel field programmable gate array (FPGA)-based acceleration solution with MapReduce framework on multiple hardware accelerators. The second section discusses network-on-chip, including an implementation of a multiprocessor system-on-chip platform with shared memory access, end-to-end quality-of-service metrics modeling based on a multi-application environment in network-on-chip, and a 3D ant colony routing (3D-ACR) for network-on-chip with three different 3D topologies. The final section addresses the methodology of system codesign. The book introduces a new software-hardware codesign flow for embedded systems that models both processors and intellectual property cores as services. It also proposes an efficient algorithm for dependent task software-hardware codesign with the greedy partitioning and insert scheduling method (GPISM) by task graph

فهرست مطالب

Content: Reconfigurable SystemsEffective and Efficient Design Space Exploration for Heterogeneous Microprocessor Systems on Chip Chao Wang, Peng Chen, Xi Li, Xuda Zhou, Xuehai Zhou, and Nadia NedjahInteger DCT-Based Real-Time Video Watermarking for H.264 Encoder Amit M. Joshi, Vivekanand Mishra, and R.M. PatrikarFPGA-Accelerated Algorithm for the Regular Expressions Matching System Pawel Russek and Kazimierz WiatrCase Study of Genome Sequencing on an FPGA: Survey and a New Perspective Chao Wang, Peng Chen, Xi Li, Xiang Ma, Qi Yu, Xuehai Zhou, and Nadia NedjahNetwork-on-ChipInterprocess Communication via Crossbar for Shared Memory Multiprocessor Systems on Chip Luiza de Macedo Mourelle, Nadia Nedjah, and Fabio Goncalves PessanhaExtended Quality of Service Modeling Based on Multiapplication Environment in Network on Chip Abdelkader Saadaoui and Salem NasriAnt Colony Routing for Latency Reduction in 3D Network-on-Chips Luneque Del Rio Souza e Silva Jr., Nadia Nedjah, and Luiza de Macedo MourelleSystems CodesignCodem: Software/Hardware Codesign for Embedded Multicore Systems Supporting Hardware Services Chao Wang, Xi Li, Xuehai Zhou, Nadia Nedjah, and Aili WangGreedy Partitioning and Insert Scheduling Algorithm for Hardware-Software Codesign on MPSoCsChao Wang, Chunsheng Li, Xi Li, Aili Wang, Fahui Jia, Xuehai Zhou, and Nadia Nedjah

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