Radio Frequency Integrated Circuit Design

Radio Frequency Integrated Circuit Design Second Edition......Page 2
Contents......Page 6
Foreword to the First Edition......Page 14
Preface......Page 18
Acknowledgments......Page 20
1.1 Introduction......Page 22
1.2.2 Units for Microwave and Low-Frequency Analog Design......Page 23
1.3 Radio-Frequency Integrated Circuits Used in a Communications Transceiver......Page 25
1.4 Overview......Page 26
References......Page 27
2.2 Noise......Page 28
2.2.2 Available Noise Power......Page 29
2.2.3 Available Power from Antenna......Page 30
2.2.4 The Concept of Noise Figure......Page 31
2.2.5 The Noise Figure of an Amplifier Circuit......Page 35
2.2.6 Phase Noise......Page 37
2.3 Linearity and Distortion in RF Circuits......Page 39
2.3.1 Power Series Expansion......Page 40
2.3.2 Third-Order Intercept Point......Page 43
2.3.3 Second-Order Intercept Point......Page 45
2.3.4 The 1-dB Compression Point......Page 46
2.3.5 Relationships Between 1-dB Compression and IP3 Points......Page 47
2.3.6 Broadband Measures of Linearity......Page 48
2.4 Modulated Signals......Page 50
2.4.1 Phase Modulation......Page 52
2.4.2 Frequency Modulation......Page 57
2.4.3 Minimum Shift Keying (MSK)......Page 59
2.4.4 Quadrature Amplitude Modulation (QAM)......Page 60
References......Page 61
3.1 Transmitter and Receiver Architectures and Some Design Considerations......Page 64
3.1.2 Direct Conversion Transceivers......Page 66
3.1.3 Low IF Transceiver and Other Alternative Transceiver Architectures......Page 68
3.2.1 The Noise Figure of Components in Series......Page 69
3.2.2 The Linearity of Components in Series......Page 73
3.2.3 Dynamic Range......Page 75
3.2.4 Image Signals and Image Reject Filtering......Page 77
3.2.5 Blockers and Blocker Filtering......Page 78
3.2.6 The Effect of Phase Noise on SNR in a Receiver......Page 80
3.2.7 DC Offset......Page 81
3.2.8 Second-Order Nonlinearity Issues......Page 82
3.2.9 Receiver Automatic Gain Control Issues......Page 83
3.2.10 EVM in Transmitters Including Phase Noise, Linearity, IQ Mismatch, EVM with OFDM Waveforms, and Nonlinearity\r......Page 84
3.2.11 ADC and DAC Specifications......Page 87
3.3 Antennas and the Link Between a Transmitter and a Receiver......Page 91
References......Page 94
4.2 Bipolar Transistor Description......Page 96
4.4 Small-Signal Model......Page 99
4.5 Small-Signal Parameters......Page 100
4.6 High-Frequency Effects......Page 101
4.6.1 fT as a Function of Current......Page 103
4.7.1 Thermal Noise in Transistor Components......Page 104
4.7.3 1/f Noise......Page 105
4.8 Base Shot Noise Discussion......Page 106
4.10 Bipolar Transistor Design Considerations......Page 107
4.11 CMOS Transistors......Page 108
4.11.1 NMOS Transistor Operation......Page 110
4.11.3 CMOS Small-Signal Model......Page 111
4.11.4 fT and fmax for CMOS Transistors......Page 113
4.12.2 Symmetry......Page 119
4.12.3 Matching......Page 120
References......Page 121
5.1 Introduction......Page 122
5.2 Review of the Smith Chart......Page 124
5.3 Impedance Matching......Page 127
5.4 Conversions Between Series  and Parallel Resistor-Inductorand Resistor-Capacitor Circuits......Page 132
5.5 Tapped Capacitors and Inductors......Page 133
5.6 The Concept of Mutual Inductance......Page 135
5.7 Matching Using Transformers......Page 137
5.8 Tuning a Transformer......Page 138
5.9 The Bandwidth of an Impedance Transformation Network......Page 139
5.10 Quality Factor of an LC Resonator......Page 141
5.11 Broadband Impedance Matching......Page 143
5.12 Transmission Lines......Page 146
5.13 S, Y, and Z Parameters......Page 147
References......Page 149
6.2 The Technology Back End and Metalization in IC Technologies......Page 152
6.3 Sheet Resistance and the Skin Effect......Page 153
6.4 Parasitic Capacitance......Page 155
6.5 Parasitic Inductance......Page 157
6.7 Poly Resistors and Diffusion Resistors......Page 158
6.8 Metal-Insulator-Metal Capacitors and Stacked Metal Capacitors......Page 159
6.9 Applications of On-Chip Spiral Inductors and Transformers......Page 160
6.10 Design of Inductors and Transformers......Page 161
6.11 Some Basic Lumped Models for Inductors......Page 163
6.12 Calculating the Inductance of Spirals......Page 164
6.14 The Quality Factor of an Inductor......Page 165
6.15 Characterization of an Inductor......Page 169
6.16 Some Notes about the Proper Use of Inductors......Page 170
6.17 Layout of Spiral Inductors......Page 173
6.18 Isolating the Inductor......Page 174
6.20 Basic Transformer Layouts in IC Technologies......Page 175
6.21 Multilevel Inductors......Page 178
6.22 Characterizing Transformers for Use in ICs......Page 180
6.23 On-Chip Transmission Lines......Page 181
6.23.2 Transmission Line Examples......Page 182
6.24 High-Frequency Measurement of On-Chip Passives and Some Common De-Embedding Techniques......Page 185
6.25 Packaging......Page 186
References......Page 190
7.1.1 Common-Emitter/Source Amplifier (Driver)......Page 192
7.1.2 Simplified Expressions for Widely Separated Poles......Page 196
7.1.3 The Common-Base/Gate Amplifier (Cascode)......Page 197
7.1.4 The Common-Collector/Drain Amplifier (Emitter/Source Follower)......Page 199
7.2.1 Common-Emitter/Source with Series Feedback (Emitter/SourceDegeneration)......Page 202
7.2.2 The Common-Emitter/Source with Shunt Feedback......Page 204
7.3.1 Input Referred Noise Model of the Bipolar Transistor......Page 207
7.3.2 Noise Figure of the Common-Emitter Amplifier......Page 209
7.3.3 Noise Model of the CMOS Transistor......Page 211
7.3.4 Input Matching of LNAs for Low Noise......Page 212
7.3.5 Relationship Between Noise Figure and Bias Current......Page 222
7.3.6 Effect of the Cascode on Noise Figure......Page 224
7.3.7 Noise in the Common-Collector/Drain Amplifier......Page 225
7.4.1 Exponential Nonlinearity in the Bipolar Transistor......Page 226
7.4.3 Nonlinearity in the Output Impedance of the Bipolar Transistor......Page 232
7.4.5 Linearity in Common-Collector/Drain Configuration......Page 234
7.5 Stability......Page 235
7.6.1 Bipolar Differential Pair......Page 236
7.6.2 Linearity in Bipolar Differential Pairs......Page 238
7.6.3 CMOS Differential Pair......Page 239
7.6.4 Linearity of the CMOS Differential Pair......Page 240
7.7 Low Voltage Topologies for LNAs and the Use of On-Chip Transformers......Page 241
7.8 DC Bias Networks......Page 243
7.8.1 Temperature Effects......Page 244
7.8.2 Temperature Independent Reference Generators......Page 245
7.8.3 Constant GM Biasing for CMOS......Page 248
7.9 Broadband LNA Design Example......Page 249
7.10 Distributed Amplifiers......Page 252
7.10.1 Transmission Lines......Page 254
7.10.2 Steps in Designing the Distributed Amplifier......Page 256
References......Page 257
Selected Bibliography......Page 258
8.3 Basic Mixer Operation......Page 260
8.4 Transconductance-Controlled Mixer......Page 261
8.5 Double-Balanced Mixer......Page 263
8.6 Mixer with Switching of Upper Quad......Page 266
8.6.2 Picking the LO Level......Page 267
8.6.3 Analysis of Switching Modulator......Page 269
8.7 Mixer Noise......Page 271
8.7.1 Summary of Bipolar Mixer Noise Components......Page 277
8.7.2 Summary of CMOS Mixer Noise Components......Page 279
8.8.2 Undesired Nonlinearity......Page 280
8.10 General Design Comments......Page 283
8.10.3 Improvement of IP3......Page 284
8.10.5 Effect of Bond Pads and the Package......Page 285
8.10.6 Matching, Bias Resistors, Gain......Page 286
8.11 Image-Reject and Single-Sideband Mixer......Page 290
8.11.1 Alternative Single-Sideband Mixers......Page 291
8.11.2 Generating 90° Phase Shift......Page 292
8.11.3 Image Rejection with Amplitude and Phase Mismatch......Page 295
8.12 Alternative Mixer Designs......Page 297
8.12.3 Mixer with Simultaneous Noise and Power Match......Page 298
8.12.4 Mixers with Coupling Capacitors......Page 300
8.12.6 Integrated Passive Mixer......Page 301
8.12.7 Subsampling Mixer......Page 302
References......Page 310
Selected Bibliography......Page 311
9.2 The LC Resonator......Page 312
9.3 Adding Negative Resistance Through Feedback to the Resonator......Page 313
9.4 Popular Implementations of Feedback to the Resonator......Page 315
9.5 Configuration of the Amplifier (Colpitts or –Gm)......Page 316
9.6.1 Oscillator Closed-Loop Analysis......Page 317
9.6.2 Capacitor Ratios with Colpitts Oscillators......Page 319
9.6.3 Oscillator Open-Loop Analysis......Page 322
9.6.4 Simplified Loop Gain Estimates......Page 324
9.7.1 Negative Resistance of the Colpitts Oscillator......Page 325
9.7.2 Negative Resistance for Series and Parallel Circuits......Page 326
9.7.3 Negative Resistance Analysis of -Gm Oscillator......Page 328
9.8 Comments on Oscillator Analysis......Page 330
9.10 A Modified Common-Collector Colpitts Oscillator with Buffering......Page 332
9.11 Several Refinements to the -Gm Topology Using BipolarTransistors......Page 333
9.12 The Effect of Parasitics on the Frequency of Oscillation......Page 336
9.13 Large-Signal Nonlinearity in the Transistor......Page 337
9.14 Bias Shifting During Startup......Page 338
9.15 Colpitts Oscillator Amplitude......Page 339
9.16 -Gm Oscillator Amplitude......Page 341
9.17 Phase Noise......Page 342
9.17.1 Linear or Additive Phase Noise and Leeson’s Formula......Page 343
9.17.2 Some Additional Notes About Low-Frequency Noise......Page 349
9.17.3 Nonlinear Noise......Page 350
9.17.4 Impulse Sensitivity Noise Analysis......Page 351
9.18 Making the Oscillator Tunable......Page 352
9.19.1 Bank Switching......Page 368
9.19.2 gm Matching and Waveform Symmetry......Page 370
9.19.3 Differential Varactors and Differential Tuning......Page 371
9.20 VCO Automatic-Amplitude Control Circuits......Page 374
9.21 Supply Noise Filters in Oscillators, Example Circuit......Page 383
9.22 Ring Oscillators......Page 384
9.23 Quadrature Oscillators and Injection Locking......Page 397
9.23.1 Phase Shift of Injection Locked Oscillator......Page 402
9.23.2 Parallel Coupled Quadrature LC Oscillators......Page 403
9.23.3 Series Coupled Quadrature Oscillators......Page 408
9.23.4 Other Quadrature Generation Techniques......Page 409
9.24.2 Crystal Oscillators......Page 410
References......Page 414
Selected Bibliography......Page 416
10.2 Integer-N PLL Synthesizers......Page 418
10.3.1 Voltage Controlled Oscillators (VCOs) and Dividers......Page 420
10.3.2 Phase Detectors......Page 421
10.3.3 The Loop Filter......Page 424
10.4.1 Simplified Loop Equations......Page 426
10.4.2 PLL System Frequency Response and Bandwidth......Page 429
10.4.3 Complete Loop Transfer Function Including C2......Page 430
10.5 Discrete Time Analysis for PLL Synthesizers......Page 431
10.6 Transient Behavior of PLLs......Page 433
10.6.1 PLL Linear Transient Behavior......Page 434
10.6.2 Nonlinear Transient Behavior......Page 437
10.6.3.1 VCO Noise......Page 443
10.6.3.5 Charge Pump Noise......Page 444
10.6.4 In-Band and Out-of-Band Phase Noise in PLL Synthesis......Page 445
10.7 Fractional-N PLL Frequency Synthesizers......Page 450
10.7.1 Fractional-N Synthesizer with a Dual Modulus Prescaler......Page 452
10.7.2 Fractional-N Synthesizer with Multimodulus Divider......Page 453
10.7.3 Fractional-N Spurious Components......Page 455
References......Page 457
11.2 Power Capability......Page 462
11.3 Efficiency Calculations......Page 463
11.4.1 Matching to S22* Versus Matching to Gopt......Page 464
11.5 Class A, B, and C Amplifiers......Page 465
11.5.1 Class B Push-Pull Arrangements......Page 473
11.5.2 Models for Transconductance......Page 474
11.6 Class D Amplifiers......Page 484
11.7.1 Analysis of Class E Amplifier......Page 485
11.7.2 Class E Equations......Page 487
11.7.4 Saturation Voltage and Resistance......Page 488
11.7.5 Transition Time......Page 489
11.8 Class F Amplifiers......Page 491
11.8.1 Variation on Class F: Second-Harmonic Peaking......Page 493
11.8.2 Variation on Class F: Quarter-Wave Transmission Line......Page 494
11.9 Class G and H Amplifiers......Page 496
11.10 Summary of Amplifier Classes for RF Integrated Circuits......Page 497
11.11 AC Load Line......Page 498
11.12 Matching to Achieve Desired Power......Page 499
11.14 Current Limits......Page 501
11.16 Power Combining......Page 503
11.17 Thermal Runaway—Ballasting......Page 504
11.18 Breakdown Voltage and Biasing......Page 506
11.20.2 AM-to-PM Conversion......Page 507
11.20.4 Linearization Techniques......Page 508
11.20.6 Feedback......Page 509
11.21 CMOS Power Amplifier Examples......Page 510
References......Page 511
About the Authors......Page 514
Index......Page 516