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دانلود کتاب Nanotechnology in Electronics, Photonics, Biosensors and Energy Systems

دانلود کتاب نانوتکنولوژی در الکترونیک، فوتونیک، حسگرهای زیستی و سیستم‌های انرژی

Nanotechnology in Electronics, Photonics, Biosensors and Energy Systems

مشخصات کتاب

Nanotechnology in Electronics, Photonics, Biosensors and Energy Systems

ویرایش:  
نویسندگان: , , ,   
سری: Selected Topics in Electronics and Systems, Vol. 67 
ISBN (شابک) : 9789811283758, 9789811283772 
ناشر: World Scientific Publishing 
سال نشر: 2024 
تعداد صفحات: 257 
زبان: English 
فرمت فایل : PDF (درصورت درخواست کاربر به PDF، EPUB یا AZW3 تبدیل می شود) 
حجم فایل: 30 مگابایت 

قیمت کتاب (تومان) : 84,000



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توجه داشته باشید کتاب نانوتکنولوژی در الکترونیک، فوتونیک، حسگرهای زیستی و سیستم‌های انرژی نسخه زبان اصلی می باشد و کتاب ترجمه شده به فارسی نمی باشد. وبسایت اینترنشنال لایبرری ارائه دهنده کتاب های زبان اصلی می باشد و هیچ گونه کتاب ترجمه شده یا نوشته شده به فارسی را ارائه نمی دهد.


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فهرست مطالب

Contents
Preface
Heating Effects on Nanofabricated Plasmonic Dimers with Interconnects
	1. Introduction
	2. Experiment
	3. Results and Discussion
	4. Conclusion
	Acknowledgments
	References
Utilizing Machine Learning for Rapid Discrimination and Quantification of Volatile Organic Compounds in an Electronic Nose Sensor Array
	1. Introduction
	2. Experimental Methods
		2.1. Sensor Fabrication
		2.2. Sensor Experiment
		2.3. Machine Learning Methods
	3. Results
		3.1. Chemiresistor Sensor Responses
		3.2. Vapor Classification and Concentration Prediction
	4. Conclusions
	Acknowledgments
	References
Modeling of Enhancement Mode HEMT with Π-Gate Optimization for High Power Applications
	1. Introduction
	2. Proposed Device Architecture and Simulation Setup
		2.1. Device energy-band diagram
	3. Device Physics
		3.1. 2DEG charge density
		3.2. Threshold voltage
		3.3. Transconductance and drain current model of HEMT
	4. TCAD Modeling and Simulation Results
		4.1. DC analysis
		4.2. Small signal analysis
	5. Conclusion
	References
Encryption Using Optical Pseudo-Random Binary Sequence Based on Optical Logic Gate
	1. Introduction
	2. Optical Logic Gate Based on QDSOA-MZI
	3. Devices and Rate Equations
	4. PRBS Model
	5. Encryption/Decryption with Keystream
	6. Conclusion
	References
Behavioral Modeling of the Pinched Hysteresis Loop of a Pt/TiO2/Pt Memristor
	1. Introduction
	2. Behavioral Model
		2.1. Formulation of Current
		2.2. Formulation of Voltage
	3. Conclusion
	Acknowledgments
	References
Design and Simulation of Multi-State D-Latch Circuit Using QDC-SWS FETs
	1. Introduction
	2. 8-State QDC SWS-FET and Multi-Bit Logic
	3. QDC-SWS-FET Analog Behavioral Model (ABM)
	4. 8-State QDC-SWS FET-Based Inverter Model
	5. D Latch Circuit Based on the 8-State Inverter Using QDC-SWS FETs
	6. D-Latch Circuit Simulation Results
	7. Conclusion
	References
Hybrid Mode-Locked Fiber Ring Laser Using Graphene Saturable Absorbers to Generate 20 and 50-GHz Pulse Trains
	1. Introduction
	2. Experimental Setup
	3. Active and Passive Mode-Locking
		3.1. Active mode-locking
		3.2. Passive mode-locking
	4. Numerical Simulation
		4.1. Laser pulse propagation mathematical model
		4.2. Variation of pulse-width with absorption parameters
	5. Experiment Results of Hybrid Mode-Locking
	6. Conclusion
	Disclosures
	References
Low Noise Gain and Index Tailored External Cavity Laser Operating at 1310 nm for Performance Enhancements of IMDD Photonic Links
	1. Background
	2. Identification and Significance of the Innovation
	3. Gain & Index Tailored (GIT) Ridge Waveguide Laser
	4. Gain & Index Tailored (GIT) Gain Chip
	5. Semiconductor Gain Chip External Cavity Laser
	6. GIT-Gain Chip External Cavity Laser Prototype Results
	7. Relative Intensity Noise Measurement
	8. IMDD Link Analysis–Projection
		8.1. Link Gain
		8.2. Noise Figure
	9. Conclusion
	References
Compute-in-Memory SRAM Cell Using Multistate Spatial Wavefunction Switched (SWS)-Quantum Dot Channel (QDC) FET
	1. Introduction
	2. SRAM-Based CIM Circuit
		2.1. SWSFET-based complementary 2-bit/4-state SRAM
			2.1.1. 2-bit/4-state SWSFET-based inverter
			2.1.2. 2-bit/4-state SWSFET-based SRAM unit cell
		2.2. SWSFET-based SRAM compute-in-memory cell
		2.3. Simulation results
	3. Conclusion
	References
High Speed 1550 nm Indium Gallium Arsenide-Indium Phosphide Photodetector
	1. Introduction
	2. Conventional Photodiode Structure and Operation
	3. Uni-traveling Carrier Photodiode Structure and Ope
		3.1. Research Approach
	4. Experimental Testing and Setup
	5. Future Work
	6. Conclusion
	References
1D and 2D Chaotic Time Series Prediction Using Hierarchical Reservoir Computing System
	1. Introduction
	2. Cascade Chaotic Maps
	2.1. Cascade 1D Logistic Map
	2.2. Cascade 2D Henon Map
	3. Conventional RC Architecture
	3.1. Input Layer
	3.2. Mask
	3.3. Encoding Technique
	3.4. Memristive Reservoir
	3.5. Output Layer
	4. Hierarchical RC Architecture
	5. Simulation Results and Analysis
	6. Conclusion and Future Work
	References
PCB Security Modules for Reverse-Engineering Resistant Design
	1. Introduction
	2. Attack Models
		2.1. PCBs Brute Force Copying
		2.2. PCBs Hacking
	3. PCB Attacks and Reverse Engineering
	4. Transformable-Vias Structure in PCBs
	5. PCB Security Modules Using Transformable-Vias Structure
	6. Eye Diagram Analysis and Q Factor
	7. Experimental Results
	8. Conclusion
	References
Next Generation RF Modules for 5G, IoT, AR/VR and RFID Applications
	1. Introduction
	2. Highly-Scalable Additively Manufactured Tile-Based Phased Array
	3. Fully-Passive Rotman-Based Harmonic mmID Tag for Ultra-Long Range Localization and Wide Angular Coverage
	4. Low-Power mm-Wave Backscattering Modules for Localization and Orientation Sensing
	5. Conclusion
	References
Fabrication of Multi-Bit SRAMs Using Quantum Dot Channel (QDC)-Quantum Dot Gate (QDG) FET
	1. Introduction
	2. QDC-QDG-FET Schematic and Theory
		2.1. Device Cross-section
		2.2. Theory
	3. Fabrication
	4. Results and Discussion
		4.1. Experimental Results
		4.2. Discussion
	5. Conclusion
	Acknowledgments
	References
Enhancing Number of Bits Via Mini-Energy Band Transitions Using Si Quantum Dot Channel (QDC) and Ge Quantum Dot Gate (QDG) FETs and NVRAMs
	1. Introduction
	2. Integrating Additional Oxide Cladded Ge Quantum Dot Layers in the Gate Region
	3. QD-NVRAM with Asymmetric SiOx-Si QDC for Additional States
	4. QDC-FETs on Poly-Si Thin Film and Potential to Implement 3D FETs and NVMs
	5. 3D Stack of QDC-FETs and QDC-NAND with Gate All Around (GAA)
	6. Conclusion
	References
Filtration Methods for Microplastic Removal in Wastewater Streams — A Review
	1. Introduction
	2. Filtration Methods
		2.1. Conventional Methods
		2.2. Chemical Methods
		2.3. Biological Methods
	3. Advanced Filtration Technologies
	4. Challenges and Limitations
	5. Conclusions and Outlook
	Acknowledgment
	References
Numerical Investigation of the Electrothermal Properties of SOI FinFET Transistor
	1. Introduction
	2. Electrothermal Formulation
	3. Results and Discussions
	4. Conclusion
	References
Memristor-Based Material Implication Logic: Prelude to In-Memory Computing
	1. Introduction
	2. Fabrication and Characterization of Memristor
	3. Demonstration of IMP Logic
	4. Conclusion
	References
Magnetostrictive Fiber Sensors as Total Field Magnetometers
	1. Background
		1.1. Magnetostrictive Fiber Sensor Architecture
	2. Sensor Fabrication
	3. Test Results
	4. Discussion
	References
Propagation Delay and Power Dissipation Analysis for a 2-Bit SRAM Using Multi-State SWS Inverter
	1. Introduction
	2. Four-state SWS Inverter
	3. SWSFET based 6T 2-bit SRAM
		3.1. Read and Write operation of 6T SWSFET based 2-bit SRAM
		3.2. Propagation delay
		3.3. Power dissipation
		3.4. Comparison of propagation delay and power dissipation
	4. Conclusion
	References
Ultra-Short Pulse-Train Generation of 30-GHz Repetition Rate Using Rational Harmonic Mode Locking and Nonlinear Polarization Rotation
	1. Introduction
	2. Fiber Ring Laser Experimental Setup and Mathematical Model
		2.1. Experiment Setup
		2.2. Mathematical Model of Pulse Propagation
	3. Rational Harmonic Mode-Locking
	4. Nonlinear Polarization Rotation
	5. Simulation Results
	6. Experiment Results
	7. Conclusion and Discussion
	Disclosures
	References
Threshold Inverter Quantizer (TIQ)-Based 2-Bit Comparator Using Spatial Wavefunction Switched (SWS) FET Inverters
	1. Introduction
	2. SWSFET Device Structure
	3. Flash ADC
	4. Threshold Inverter Quantizer using 4-state SWSFETs
		4.1. Device structure of 2-bit TIQ SWS CMOS-X-based inverter
		4.2. SWSFET Model and Parameters
		4.3. Simulation of TIQ-based Comparator
	5. Conclusion
	References
Novel Multi-State QDC-QDG FETs and Gate All Around (GAA) FETs for Integrated Logic and QD-NVRAMs
	1. Introduction
	2. Experimental Si QDC and Ge QDG Exhibiting 5-6 States in I-V Characteristics
		2.1. Quantum simulations: QDC-QDG FETs
	3. Gate All Around (GAA) QDC-QDG FETs and NVRAMs
	4. Multi-state QDC-SWS FET Configurations with Single Drain
	5. Conclusion
	References
Author Index




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