Nanocrystals in Nonvolatile Memory

Cover
Half Title
Title Page
Copyright Page
Dedication
Table of Contents
Preface
Acknowledgments
Chapter 1: Nanocrystal Materials, Fabrications, and Characterizations
	1.1: Introduction
		1.1.1: Nanomaterials for a Nonvolatile Memory Device
		1.1.2: Overview of Nonvolatile Memory
		1.1.3: Classification of Nanomaterials
	1.2: Synthesis and Fabrication of Nanocrystals for NVM
		1.2.1: 0D Nanocrystals
		1.2.2: 1D Nanocrystals
		1.2.3: 2D Nanocrystals
		1.2.4: 3D Nanocrystals
	1.3: Characterization of Nanoparticles
		1.3.1: Microscopy Technique
			1.3.1.1: Electron microscopy
			1.3.1.2: Reflection high-energy electron diffraction
			1.3.1.3: Scanning probe microscopy
		1.3.2: X-Ray-Based Methods
			1.3.2.1: X-ray diffraction
			1.3.2.2: Small-angle X-ray scattering
			1.3.2.3: X-ray photoelectron spectroscopy
			1.3.2.4: X-ray absorption spectroscopy
		1.3.3: Light-Based Spectroscopic Techniques
			1.3.3.1: Light scattering techniques
			1.3.3.2: Ultraviolet/visible spectroscopy
			1.3.3.3: Photoluminescence spectroscopy
			1.3.3.4: Raman spectroscopy
			1.3.3.5: Fourier transform infrared spectroscopy
	1.4: Summary
Chapter 2: Modeling and Simulation of Nanocrystal Flash Memory
	2.1: Introduction
	2.2: Developments in Nanocrystal Memory
	2.3: Model for Nanocrystal and Nitride-Trap Memory
	2.4: Memory Device Scaling with the Use of a Silicon Nanocrystal
	2.5: Modeling of Tunneling Currents
	2.6: Model for the Charging and Discharging Process
	2.7: Programming Time Model
	2.8: Growth of Metal (Au) Nanocrystals in High-κ Dielectrics
	2.9: Retention Characteristics Model
	2.10: Tunneling Characteristics of Metal-Nanocrystal- and Semiconductor-Nanocrystal-Based Gate Dielectrics
		2.10.1: Fowler–Nordheim Tunneling
		2.10.2: Direct Tunneling
	2.11: Conclusion
Chapter 3: Charge Trapping and High-κ Nanocrystal Flash Memory
	3.1: Introduction to Charge Storage Nonvolatile Memory
	3.2: Evolution of Nanocrystal-Based CS-NVM
	3.3: Reliability Challenges of Nanocrystal-Based CS-NVM
	3.4: Technical Mitigations
	3.5: Summary
Chapter 4: Silicon Nanocrystal Flash Memory
	4.1: Introduction
	4.2: Si NCs in Flash Memory
		4.2.1: Structure Development of a Si NC Floating Gate
			4.2.1.1: Si NC floating-gate story
			4.2.1.2: Preparation of Si NCs for flash memory
		4.2.2: Electrical Characteristics of Si Nanocrystal in Flash Memory
	4.3: Si Nanocrystal Trap Center Studied by Deep-Level Transient Spectroscopy
	4.4: Engineering for Improved Si Nanocrystal Flash Memory
Chapter 5: Synthesis, Characterization, and Memory Application of Germanium Nanocrystals in Dielectric Matrices
	5.1: Introduction
	5.2: Synthesis of Ge Nanocrystals
		5.2.1: Ge Atoms for Nanocrystal Growth
		5.2.2: Effect of Ge Concentration and Annealing Temperature
		5.2.3: Effect of Annealing Ambient
		5.2.4: Effect of an Oxide Barrier Layer
		5.2.5: Influence of Dielectric Matrices
	5.3: Characterizations of Ge Nanocrystals
		5.3.1: Photoluminescence Properties
		5.3.2: Electroluminescence Properties
		5.3.3: Stress in Ge Nanocrystals Embedded in Dielectrics
	5.4: Ge Nanocrystal-Based Floating-Gate Memory Devices
		5.4.1: Fabrication of Ge Nanocrystal Memory Structures
		5.4.2: Control of Nanocrystal Size
		5.4.3: Retention Properties
		5.4.4: High-κ Dielectrics
		5.4.5: Characterization Ge-Nanocrystal-Based Transistors
	5.5: Summary
Chapter 6: Nanographene Flash Memory
	6.1: Introduction
		6.1.1: Graphene Fundamentals
			6.1.1.1: Structure and electronic properties of graphene
			6.1.1.2: Graphene nanostructures and graphene nanosheets
	6.2: Preparation/Synthesis of Graphene and Nanographene
		6.2.1: Graphene Thin-Film Preparation
			6.2.1.1: Reduced graphene oxide
			6.2.1.2: Chemical vapor depositions
		6.2.2: Synthetic Strategies for Nanographene
			6.2.2.1: Top-down methods
			6.2.2.2: Bottom-up methods
	6.3: Graphene-Based Flash Memory
	6.4: Graphene Nanostructures Flash Memory
		6.4.1: Memory Window
		6.4.2: P/E Transient Time
		6.4.3: Retention Characteristics
		6.4.4: Endurance Cycles
	6.5: Graphene Memory Hybrids
		6.5.1: Flexible Transparent Flash Memory
		6.5.2: 3D Stacking
	6.6: Conclusion and Prospects
Chapter 7: Data Recovery of Flash Memory
	7.1: Introduction
	7.2: How Computers Store Information
		7.2.1: Kinds of Computer Memory
		7.2.2: Bits and Memory
	7.3: Flash Memory
		7.3.1: Introduction to Flash Memory
		7.3.2: The Features of Flash Memory
		7.3.3: Transistors
		7.3.4: NAND and NOR Flash Memory
	7.4: Data Recovery
		7.4.1: Introduction to Data Recovery
		7.4.2: The Need for Data Recovery
		7.4.3: Data Extraction/Acquisition
			7.4.3.1: Data extraction tools
			7.4.3.2: Physical extraction
	7.5: Data Recovery in Flash Media
		7.5.1: Data Loss on Flash Media
			7.5.1.1: Bit flipping
			7.5.1.2: Bad block handling
			7.5.1.3: Life span/endurance
			7.5.1.4: Retention
		7.5.2: Bad Blocks
		7.5.3: File Systems
		7.5.4: File Attributes
		7.5.5: Flash Data Recovery Techniques
			7.5.5.1: Fundamental concepts
			7.5.5.2: The flash translation layer and flash data recovery
			7.5.5.3: Data recovery for data loss due to a virus attack
			7.5.5.4: Data recovery software
			7.5.5.5: Best practice for flash
	7.6: Windows User Laboratory Activities
	7.7: Summary
Chapter 8: Nanocrystals in Resistive Random-Access Memory
	8.1: Introduction
		8.1.1: Background
		8.1.2: Prototype NVM Technologies
			8.1.2.1: Ferroelectric random-access memory
			8.1.2.2: Phase change memory
			8.1.2.3: Spin-transfer torque random-access memory
		8.1.3: Emerging NVM Technologies
			8.1.3.1: Emerging FeRAM
			8.1.3.2: Carbon memory
			8.1.3.3: Mott memory
			8.1.3.4: Macromolecular memory
			8.1.3.5: Molecular memory
			8.1.3.6: Resistive random-access memory
			8.1.3.7: History of RRAM
	8.2: Mechanisms and Materials in RRAM
		8.2.1: Resistive Switching Mechanisms
			8.2.1.1: Electrochemical metallization
			8.2.1.2: Valence change memory
			8.2.1.3: Thermochemical reaction
		8.2.2: Materials in RRAM
			8.2.2.1: Metal electrode layer
			8.2.2.2: Insulating layer
			8.2.2.3: Defect-related improvement in RRAM performance
	8.3: Applications of NCs in RRAM
		8.3.1: Improvement in Electrical Performance
			8.3.1.1: Forming process
			8.3.1.2: SET/RESET operation
			8.3.1.3: Reliability of RRAM devices
		8.3.2: Conductive Filament Formation Based on Nanocrystal Migration
		8.3.3: Charge Trapping using NCs
		8.3.4: Threshold Switching to Memory Switching
	8.4: Nanocrystals as Seed Layer in RRAM
		8.4.1: Effects of Nanocrystals in RS Layer
			8.4.1.1: Colloidal nanocrystals as switching layer
			8.4.1.2: Local electric field enhancement with nanocrystals
			8.4.1.3: Formation of homogeneous NCs for RRAM applications
		8.4.2: Bottom Electrode Modification
			8.4.2.1: Nanocrystal-based bottom electrode
			8.4.2.2: Nanopyramid-shaped bottom electrode
			8.4.2.3: Arc-shaped bottom electrode
	8.5: Summary and Future Scope
Chapter 9: HfO2-Based Ferroelectric Memory
	9.1: Introduction
	9.2: Structure of FeRAM
	9.3: Ferroelectric Properties
	9.4: Basics of Hafnium Oxide
		9.4.1: Dielectric Properties
		9.4.2: Origin of Ferroelectricity in Hafnium Oxide
	9.5: Parameters Influencing the Ferroelectric Properties of HfO2
		9.5.1: Grain Size
		9.5.2: Thermal Stress
		9.5.3: Dopants
		9.5.4: Oxygen Vacancy
		9.5.5: Film Thickness
		9.5.6: Annealing Process
		9.5.7: Electrodes
	9.6: Challenges of HfO2: in Emerging Nonvolatile Memory Devices
		9.6.1: High Coercive Field (EC)
		9.6.2: Wake-Up Effect
		9.6.3: Fatigue
		9.6.4: Retention-Endurance Dilemma
	9.7: Summary
Chapter 10: Measurement Aspects of Nonvolatile Memory
	10.1: Introduction
	10.2: Testing Memory
		10.2.1: Memory Tester
			10.2.1.1: Digital channel
			10.2.1.2: PMU
			10.2.1.3: Device power supply
			10.2.1.4: Control unit
			10.2.1.5: Capture memory: data buffer memory
			10.2.1.6: Redundancy analysis processor
			10.2.1.7: Other remarks on flash testers
		10.2.2: DUT Built-In Test-Oriented Resources
			10.2.2.1: DMA
			10.2.2.2: Threshold distribution
	10.3: Test Flow
		10.3.1: Wafer Sort
		10.3.2: Final Test
	10.4: Brief History of Flash
	10.5: Redundancy
	10.6: Cycling
	10.7: Retention
	10.8: Silicon Debug/Design Validation
	10.9: Testing Readiness
	10.10: Characterization
		10.10.1: Shmoo Plot
	10.11: Qualification
	10.12: Datasheet
		10.12.1: Product General Description
		10.12.2: Pin Name and Function
		10.12.3: Product Conceptual Schematic
		10.12.4: Command Set
		10.12.5: DC Characteristics
		10.12.6: AC Characteristics
		10.12.7: Endurance Characteristics
		10.12.8: Package Dimensions
		10.12.9: Order Code
	10.13: Datasheet Gray Areas
	10.14: Error Correction Code
Chapter 11: Applications of Emerging Nonvolatile Memories
	11.1: Introduction
	11.2: Potential Applications of Nonvolatile Memory
	11.3: NVMs for Vision Sensor and Future Prospects
	11.4: Future Prospect of NVM for Tactile Sensors
	11.5: In-Sensor and Near-Sensor Processing with NVMs and Future Prospects
Chapter 12: Emerging Nonvolatile Memories for Machine Learning
	12.1: Introduction
	12.2: Conventional Computer Hardware and Machine Learning
		12.2.1: The Basics of Computer Hardware
		12.2.2: The Basics of Machine Learning
		12.2.3: Status Quo
	12.3: Towards In-Memory Computing
		12.3.1: General Overview
		12.3.2: Implementation from First Principles
		12.3.3: Brief Description of Memory Cells, Their Physical Mechanisms, and Performance
		12.3.4: Challenges with Analogue Hardware
	12.4: Addressing Existing Challenges
		12.4.1: I-V Nonlinearity
		12.4.2: Faulty Devices
		12.4.3: Limited Dynamic Range
		12.4.4: Line Resistance
		12.4.5: Programming Nonlinearity
		12.4.6: Random Telegraph Noise
		12.4.7: Nonideality-Agnostic Approaches
	12.5: Summary and Conclusion
Index