Multicore computing : algorithms, architectures, and applications

 Content: Memory Hierarchy for Multicore and Manycore Processors  Mohamed Zahran and Bushra Ahsan Design Issues  Physical Memory  Cache Hierarchy Organization  Cache Hierarchy Sharing  Cache Hierarchy Optimization  Cache Coherence  Support for Memory Consistency Models  Cache Hierarchy in Light of New Technologies  Concluding Remarks   FSB: A Flexible Set Balancing Strategy for Last Level Caches Mohammad Hammoud, Sangyeun Cho, and Rami Melhem Introduction  Motivation and Background Flexible Set Balancing (FSB) Quantitative Evaluation Related Work  Conclusions and Future Work   The SPARC Processor Architecture  Simone Secchi, Antonino Tumeo, and Oreste Villa Introduction  The SPARC Instruction Set Architecture  Memory Access Synchronization  The NIAGARA Processor Architecture  Core Micro-Architecture  Core Interconnection  Memory Subsystem Niagara Evolutions   The Cilk and Cilk++ Programming Languages  Hans Vandierendonck Abstract  Introduction  The Cilk Language Implementation Analyzing Parallelism in Cilk Programs  Hyperobjects Conclusion  Multithreading in the PLASMA Library  Jakub Kurzak, Piotr Luszczek, Asim YarKhan, Mathieu Faverge, Julien Langou, Henricus Bouwmeester, and Jack Dongarra Introduction  Multithreading in PLASMA  Dynamic Scheduling with QUARK  Parallel Composition  Task Aggregation  Nested Parallelism  Efficient Aho-Corasick String Matching on Emerging Multicore Architectures  Antonino Tumeo, Oreste Villa, Simone Secchi, and Daniel Chavarria-Miranda Introduction  Related Work  Preliminaries  Algorithm Design  Experimental Results  Conclusions  Sorting on a Graphics Processing Unit (GPU)  Shibdas Bandyopadhyay and Sartaj Sahni Graphics Processing Units  Sorting Numbers on GPUs Sorting Records on GPUs  Scheduling DAG Structured Computations  Yinglong Xia and Viktor K. Prasanna Introduction  Background  Related Work  Lock-Free Collaborative Scheduling Hierarchical Scheduling with Dynamic Thread Grouping Conclusion   Evaluating Multicore Processors and Accelerators for Dense Numerical Computations  Seunghwa Kang, Nitin Arora, Aashay Shringarpure, Richard W. Vuduc, and David A. Bader Introduction Interarchitectural Design Trade-Offs Descriptions and Qualitative Analysis of Computational Statistics Kernels  Baseline Architecture-Specific Implementations for the Computational Statistics Kernels Experimental Results for the Computational Statistics Kernels Descriptions and Qualitative Analysis of Direct N-Body Kernels  Direct N-Body Implementations Experimental Results and Discussion for the Direct N-Body Implementations Conclusions  Sorting on the Cell Broadband Engine  Shibdas Bandyopadhyay, Dolly Sharma, Reda A. Ammar, Sanguthevar Rajasekaran, and Sartaj Sahni The Cell Broadband Engine  High-level Strategies for Sorting  SPU Vector and Memory Operations  Sorting Numbers Sorting Records  GPU Matrix Multiplication  Junjie Li, Sanjay Ranka, and Sartaj Sahni Introduction  GPU Architecture  Programming Model  Occupancy  Single Core Matrix Multiply  Multicore Matrix Multiply  GPU Matrix Multiply A Comparison   Backprojection Algorithms for Multicore and GPU Architectures  William Chapman, Sanjay Ranka, Sartaj Sahni, Mark Schmalz, Linda Moore, Uttam Majumder, and Bracy Elton Summary of Backprojection  Partitioning Backprojection for Implementation on a GPU  Single Core Backprojection  GPU Backprojection  Conclusion  Acknowledgments   Index