Microchip Fabrication, A Practical Guide to Semiconductor Processing

Preface
1 The Semiconductor Industry
Introduction
Birth of an Industry
The Solid-State Era
Integrated Circuits (ICs)
Process and Product Trends
	Moore’s Law
	Decreasing Feature Size
	Increasing Chip and Wafer Size
	Reduction in Defect Density
	Increase in Interconnection Levels
	The Semiconductor Industry Association Roadmap
	Chip Cost
Industry Organization
Stages of Manufacturing
Six Decades of Advances in Microchip Fabrication Processes
The Nano Era
Review Topics
References
2 Properties of Semiconductor Materials and Chemicals
Introduction
Atomic Structure
	The Bohr Atom
The Periodic Table of the Elements
Electrical Conduction
	Conductors
Dielectrics and Capacitors
	Resistors
Intrinsic Semiconductors
Doped Semiconductors
Electron and Hole Conduction
	Carrier Mobility
Semiconductor Production Materials
	Germanium and Silicon
Semiconducting Compounds
Silicon Germanium
Engineered Substrates
Ferroelectric Materials
Diamond Semiconductors
Process Chemicals
	Molecules, Compounds, and Mixtures
	Ions
States of Matter
	Solids, Liquids, and Gases
	Plasma State
Properties of Matter
	Temperature
	Density, Specific Gravity, and Vapor Density
Pressure and Vacuum
Acids, Alkalis, and Solvents
	Acids and Alkalis
	Solvents
Chemical Purity and Cleanliness
	Safety Issues
	The Material Safety Data Sheet
Review Topics
References
3 Crystal Growth and Silicon Wafer Preparation
Introduction
Semiconductor Silicon Preparation
	Silicon Wafer Preparation Stages
Crystalline Materials
	Unit Cells
	Poly and Single Crystals
Crystal Orientation
Crystal Growth
	Czochralski Method
	Liquid-Encapsulated Czochralski
	Float Zone
Crystal and Wafer Quality
	Point Defects
	Dislocations
	Growth Defects
Wafer Preparation
	End Cropping
	Diameter Grinding
	Crystal Orientation, Conductivity, and Resistivity Check
	Grinding Orientation Indicators
Wafer Slicing
Wafer Marking
Rough Polish
Chemical Mechanical Polishing
Backside Processing
Double-Sided Polishing
Edge Grinding and Polishing
Wafer Evaluation
Oxidation
Packaging
	Wafer Types and Uses
	Reclaim Wafers
Engineered Wafers (Substrates)
Review Topics
References
4 Overview of Wafer Fabrication and Packaging
Introduction
Goal of Wafer Fabrication
Wafer Terminology
Chip Terminology
Basic Wafer-Fabrication Operations
Layering
	Patterning
	Circuit Design
	Reticle and Masks
	Doping
	Heat Treatments
Example Fabrication Process
Wafer Sort
Packaging
Summary
Review Topics
References
5 Contamination Control
Introduction
	The Problem
	Contamination-Caused Problems
Contamination Sources
	General Sources
	Air
	Clean Air Strategies
	Cleanroom Workstation Strategy
	Tunnel or Bay Concept
	Micro-and Mini-Environments
	Temperature, Humidity, and Smog
Cleanroom Construction
	Construction Materials
	Cleanroom Elements
	Personnel-Generated Contamination
	Process Water
	Process Chemicals
	Equipment
Cleanroom Materials and Supplies
Cleanroom Maintenance
Wafer-Surface Cleaning
	Particulate Removal
	Wafer Scrubbers
	High-Pressure Water Cleaning
	Organic Residues
	Inorganic Residues
	Chemical-Cleaning Solutions
	General Chemical Cleaning
	Oxide Layer Removal
	Room Temperature and Ozonated Chemistries
	Water Rinsing
	Drying Techniques
	Contamination Detection
Review Topics
References
6 Productivity and Process Yields
Overview
Yield Measurement Points
Accumulative Wafer-Fabrication Yield
Wafer-Fabrication Yield Limiters
	Number of Process Steps
	Wafer Breakage and Warping
	Process Variation
	Mask Defects
	Wafer-Sort Yield Factors
	Wafer Diameter and Edge Die
	Wafer Diameter and Die Size
	Wafer Diameter and Crystal Defects
	Wafer Diameter and Process Variations
	Die Area and Defect Density
	Circuit Density and Defect Density
	Number of Process Steps
	Feature Size and Defect Size
	Process Cycle Time
	Wafer-Sort Yield Formulas
Assembly and Final Test Yields
Overall Process Yields
Review Topics
References
7 Oxidation
Introduction
Silicon Dioxide Layer Uses
	Surface Passivation
	Doping Barrier
	Surface Dielectric
	Device Dielectric (MOS Gates)
	Device Oxide Thicknesses
Thermal Oxidation Mechanisms
	Influences on the Oxidation Rate
	Thermal Oxidation Methods
	Horizontal Tube Furnaces
	Temperature Control System
	Source Cabinet
	Vertical Tube Furnaces
	Rapid Thermal Processing
	High-Pressure Oxidation
	Oxidant Sources
Oxidation Processes
	Preoxidation Wafer Cleaning
Postoxidation Evaluation
	Surface Inspection
	Oxide Thickness
	Oxide and Furnace Cleanliness
	Thermal Nitridation
Review Topics
References
8 The Ten-Step Patterning Process—Surface Preparation to Exposure
Introduction
Overview of the Photomasking Process
Ten-Step Process
Basic Photoresist Chemistry
	Photoresist
Photoresist Performance Factors
	Resolution Capability
	Adhesion Capability
	Process Latitude
	Pinholes
	Particle and Contamination Levels
	Step Coverage
	Thermal Flow
	Comparison of Positive and Negative Resists
Physical Properties of Photoresists
	Solids Content
	Viscosity
	Surface Tension
	Index of Refraction
	Storage and Control of Photoresists
	Light and Heat Sensitivity
	Viscosity Sensitivity
	Shelf Life
	Cleanliness
Photomasking Processes—Surface Preparation to Exposure
Surface Preparation
	Particle Removal
	Dehydration Baking
	Wafer Priming
	Spin Priming
	Vapor Priming
Photoresist Application (Spinning)
	The Static Dispense Spin Process
	Dynamic Dispense
	Moving-Arm Dispensing
	Manual Spinners
	Automatic Spinners
	Edge Bead Removal
	Backside Coating
Soft Bake
	Convection Ovens
	Manual Hot Plates
	In-Line, Single-Wafer Hot Plates
	Moving-Belt Hot Plates
	Moving-Belt Infrared Ovens
	Microwave Baking
	Vacuum Baking
Alignment and Exposure
	Alignment and Exposure Systems
	Exposure Sources
	Alignment Criteria
	Aligner Types
	Postexposure Bake
Advanced Lithography
Review Topics
References
9 The Ten-Step Patterning Process—Developing to Final Inspection
Introduction
	Development
	Positive Resist Development
	Negative Resist Development
	Wet Development Processes
	Dry (or Plasma) Development
Hard Bake
	Hard-Bake Methods
	Hard-Bake Process
	Develop Inspect
	Develop Inspect Reject Categories
	Develop Inspect Methods
	Causes for Rejecting at the Develop Inspection Stage
Etch
Wet Etching
	Etch Goals and Issues
	Incomplete Etch
	Overetch and Undercutting
	Selectivity
	Wet-Spray Etching
	Silicon Wet Etching
	Silicon Dioxide Wet Etching
	Aluminum-Film Wet Etching
	Deposited-Oxide Wet Etching
	Silicon Nitride Wet Etching
	Vapor Etching
Dry Etch
	Plasma Etching
	Etch Rate
	Radiation Damage
	Selectivity
	Ion-Beam Etching
	Reactive Ion Etching
Resist Effects in Dry Etching
Resist Stripping
	Wet Chemical Stripping of Nonmetallized Surfaces
	Wet Chemical Stripping of Metallized Surfaces
	Dry Stripping
	Post–Ion Implant and Plasma Etch Stripping
New Stripping Challenges
Final Inspection
Mask Making
Summary
Review Topics
References
10 Next Generation Lithography
	Introduction
	Challenges of Next Generation Lithography
		High-Pressure Mercury Lamp Sources
		Excimer Lasers
		Extreme Ultraviolet
		X-Rays
		Electron Beam or Direct Writing
		Numerical Aperture of a Lens
	Other Exposure Issues
		Variable Numerical Aperture Lenses
		Immersion Exposure System
		Amplified Resist
		Contrast Effects
	Other Resolution Challenges and Solutions
		Off-Axis Illumination
		Lens Issues and Reflection Systems
		Phase-Shift Masks
		Optical Proximity Corrected or Optical Process Correction
		Annular-Ring Illumination
		Pellicles
	Surface Problems
		Resist Light Scattering
		Subsurface Reflectivity
	Antireflective Coatings
		Standing Waves
		Planarization
	Photoresist Process Advances
		Multilayer Resist or Surface Imaging
		Silylation or DESIRE Process
		Polyimide Planarization Layers
		Etchback Planarization
		Dual-Damascene Process
		Chemical Mechanical Polishing
		Slurry
		Polishing Rates
		Planarity
		Post-CMP Clean
		CMP Tools
		CMP Summary
		Reflow
		Image Reversal
		Contrast Enhancement Layers
		Dyed Resists
	Improving Etch Definition
		Lift-Off Process
	Self-Aligned Structures
	Etch Profile Control
	Review Topics
	References
11 Doping
	Introduction
	The Diffusion Concept
	Formation of a Doped Region and Junction
		The N-P Junction
		Doping Process Goals
		Graphical Representation of Junctions
		Concentration versus Depth Graphs
		Lateral Diffusion
		Same-Type Doping
	Diffusion Process Steps
	Deposition
	Lateral Diffusion
	Same-Type Doping
		Dopant Sources
	Drive-In Oxidation
		Oxidation Effects
	Introduction to Ion Implantation
	Concept of Ion Implantation
	Ion-Implantation System
		Implant Species Sources
		Ionization Chamber
		Mass Analyzing or Ion Selection
		Acceleration Tube
		Wafer Charging
		Beam Focus
		Neutral Beam Trap
		Beam Scanning
		End Station and Target Chamber
		Ion-Implant Masks
	Dopant Concentration in Implanted Regions
		Crystal Damage
		Annealing and Dopant Activation
		Channeling
	Evaluation of Implanted Layers
	Uses of Ion Implantation
	The Future of Doping
	Review Topics
	References
12 Layer Deposition
	Introduction
		Film Parameters
	Chemical Vapor Deposition Basics
		Basic CVD System Components
	CVD Process Steps
	CVD System Types
	Atmospheric-Pressure CVD Systems
		Horizontal-Tube Induction-Heated APCVD
		Barrel Radiant-Induction-Heated APCVD
		Pancake Induction-Heated APCVD
		Continuous Conduction-Heated APCVD
		Horizontal Conduction-Heated APCVD
	Low-Pressure Chemical Vapor Deposition
		Horizontal Conduction-Convection-Heated LPCVD
		Ultra-High Vacuum CVD
		Plasma-Enhanced CVD (PECVD)
		High-Density Plasma CVD
	Atomic Layer Deposition
	Vapor-Phase Epitaxy
	Molecular Beam Epitaxy
	Metalorganic CVD
	Deposited Films
	Deposited Semiconductors
	Epitaxial Silicon
	Polysilicon and Amorphous Silicon Deposition
	SOS and SOI
	Gallium Arsenide on Silicon
	Insulators and Dielectrics
		Silicon Dioxide
		Doped Silicon Dioxide
		Silicon Nitride
		High-k and Low-k Dielectrics
	Conductors
	Review Topics
	References
13 Metallization
	Introduction
	Deposition Methods
	Single-Layer Metal Systems
	Multilevel Metal Schemes
	Conductors Materials
		Aluminum
		Aluminum-Silicon Alloys
		Aluminum-Copper Alloy
		Barrier Metals
		Refractory Metals and Refractory Metal Silicides
	Plugs
	Sputter Deposition
		Copper Dual-Damascene Process
		Low-k Dielectric Materials
		The Dual-Damascene Copper Process
		Barrier or Liner Deposition
		Seed Deposition
	Electrochemical Plating
	Chemical-Mechanical Processing
	CVD Metal Deposition
		Doped Polysilicon
		CVD Refractory Deposition
	Metal-Film Uses
		MOS Gate and Capacitor Electrodes
		Backside Metallization
	Vacuum Systems
		Dry Mechanical Pumps
		Turbomolecular Hi-Vac Pumps
	Review Topics
	References
14 Process and Device Evaluation
	Introduction
	Wafer Electrical Measurements
		Resistance and Resistivity
		Resistivity Measurements
		Four-Point Probe
	Process and Device Evaluation
		Sheet Resistance
		Four-Point Probe Thickness Measurement
		Concentration or Depth Profile
		Secondary Ion Mass Spectrometry
	Physical Measurement Methods
	Layer Thickness Measurements
		Color
		Spectrophotometers or Reflectometry
		Ellipsometers
		Stylus (Surface Profilometers)
		Photoacoustic
	Gate Oxide Integrity Electrical Measurement
	Junction Depth
		Groove and Stain
		Scanning Electron Microscope Thickness Measurement
		Spreading Resistance Probe
		Secondary Ion Mass Spectrometry
		Scanning Capacitance Microscopy
		Critical Dimensions and Line-Width Measurements
		Optical Image-Shearing Dimension Measurement
		Shape Metrology and Optical Critical Dimension
	Contamination and Defect Detection
		1× Visual Surface Inspection Techniques
		1× Collimated Light
		1× Ultraviolet
		Microscope Techniques
		Automated In-Line Defect Inspection Systems
	General Surface Characterization
		Atomic Force Microscopy
		Scattrometry
	Contamination Identification
		Auger Electron Spectroscopy
		Electron Spectroscope for Chemical Analysis
		Time of Flight Secondary Ion Mass Spectrometry
		Evaluation of Stack Thickness and Composition
	Device Electrical Measurements
		Equipment
		Resistors
		Diodes
		Bipolar Transistors
		MOS Transistors
		Capacitance-Voltage Profiling
		Device Failure Analysis—Emission Microscopy
	Review Topics
	References
15 The Business of Wafer Fabrication
	Introduction
		Moore’s Law and the New Wafer-Fabrication Business
	Wafer-Fabrication Costs
		Overhead
		Materials
		Equipment
		Labor
		Production Cost Factors
		Yield
		Yield Improvements
		Yield and Productivity
		Book-to-Bill Ratio
		Cost of Ownership
	Automation
		Process Automation
	Wafer-Loading Automation
	Clustering
	Wafer-Delivery Automation
		Closed-Loop Control-System Automation
	Factory-Level Automation
	Equipment Standards
		Fab Floor Layout
		Batch versus Single-Wafer Processing
		Green Fabs
	Statistical Process Control
	Inventory Control
		Just-in-Time Inventory Control
	Quality Control and Certification—ISO 9000
	Line Organization
	Review Topics
	References
16 Introduction to Devices and Integrated Circuit Formation
	Introduction
	Semiconductor-Device Formation
		Resistors
		Capacitors
		Diodes
		Transistors
		Field-Effect Transistors
	Alternatives to MOSFET Scaling Challenges
		Conductors
	Integrated-Circuit Formation
		Bipolar Circuit Formation
		MOS Integrated Circuit Formation
	Bi-MOS
		Silicon on Insulator Isolation
	Superconductors
		Microelectromechanical Systems
		Strain Gauges
		Batteries
		Light-Emitting Diodes
		Optoelectronics
		Solar Cells
		Temperature Sensing
		Acoustic Wave Devices
	Review Topics
	References
17 Process and Device Evaluation
	Introduction
	Circuit Basics
	Integrated Circuit Types
		Logic Circuits
		Memory Circuits
		Redundancy
	The Next Generation
	Review Topics
	References
18 Packaging
	Introduction
	Chip Characteristics
	Package Functions and Design
		Substantial Lead System
		Physical Protection
		Environmental Protection
		Heat Dissipation
		Common Package Parts
		Cleanliness and Static Control
		Basic Bonding Processes
	Wire Bonding Process
		Prebonding Wafer Preparation
		Die Separation
		Die Pick and Place
		Die Inspection
		Die Attach
		Wire Bonding
		Tape Automated Bonding Process
		Bump or Ball Flip-Chip Bonding
	Example Bump or Ball Process
		Copper Metallization (Damascene) Bump Bonding
		Reflow
		Die Separation and Die Pick and Place
		Alignment of Die to Package
		Attachment to Package (or Substrate)
		Deflux
		Underfillment
		Encapsulation
		Postbonding and Preseal Inspection
		Sealing Techniques
		Lead Plating
		Plating Process Flows
		Lead Trimming
		Deflashing
		Package Marking
		Final Testing
		Environmental Tests
		Electrical Testing
		Burn-In Tests
	Package Design
		Metal Cans
		Pin Grid Arrays
		Ball-Grid Arrays or Flip-Chip Ball-Grid Arrays
		Quad Packages
		Thin Packages
		Chip-Scale Packages
		Lead on Chip
		Three-Dimensional Packages
		Stacking Die Techniques
		Three-Dimensional Enabling Technologies
		Hybrid Circuits
		Multichip Modules
		The Known Good Die Problem
	Package Type or Technology Summary
		Package or PCB Connections
		Bare Die Techniques and Blob Top
	Review Topics
	References
Glossary
Index