Fabless Semiconductor Manufacturing: In the Era of Internet of Things

Cover
Half Title
Title Page
Copyright Page
Dedication
Table of Contents
Preface
List of Abbreviations
Chapter 1: Introduction
	1.1: Introduction
	1.2: Technology Computer-Aided Design
	1.3: Physical Model Calibration
	1.4: Database for Calibration
	1.5: Design Technology Co-optimization
	1.6: Industry 4.0
	1.7: Fabless Intelligent Manufacturing
	1.8: Simulation Environment
	1.9: Nanowire Transistors
	1.10: Nanosheet Transistors
	1.11: III-Nitride Flexible Electronic Devices
	1.12: FDSOI RF Flexible Electronics
	1.13: Simulation at Atomic Scale
	1.14: Summary
Chapter 2: Fabless Intelligent Manufacturing
	2.1: Semiconductor Industry
	2.2: Performance of Manufacturing Process
	2.3: Cycle Time
	2.4: Throughput
	2.5: Handling Systems in Wafer Fabs
	2.6: Intelligent Manufacturing
	2.7: AI in Smart Manufacturing and Design
	2.8: Summary
Chapter 3: Simulation Environment
	3.1: MINIMOS-NT
	3.2: VSP
	3.3: Silvaco TCAD
	3.4: VictoryProcess
	3.5: Process Simulation
	3.6: VictoryDevice
	3.7: Device Simulation
	3.8: Model Selection
	3.9: Drift-Diffusion Transport Model
	3.10: Shockley-Read-Hall Recombination
	3.11: Low-Field Mobility Model
	3.12: Density-Gradient Model
	3.13: Bandgap Narrowing Model
	3.14: Stress/Strain Modeling
	3.15: VictoryStress
		3.15.1: VictoryStress Features and Capabilities
	3.16: Piezoresistivity
	3.17: Modeling Approaches
	3.18: Summary
Chapter 4: Nanowire Transistors
	4.1: Silicon on Insulator (SOI) Transistors
	4.2: Multi-Gate Architecture
	4.3: Ultimate Device: GAA Nanowire Transistor
	4.4: Design of Nanowire Transistors
	4.5: Process Simulation of Nanowire Transistors
	4.6: Design at Nanoscale
	4.7: Effects of Gate Length Variation
	4.8: Effects of Nanowire Diameter Variation
	4.9: Strain-Engineered Nanowire FETs
	4.10: Variability in Nanowire Transistors
	4.11: Modeling of Random Discrete Dopants
	4.12: Summary
Chapter 5: Nanosheet Transistors
	5.1: GAA Nanowire vs. Nanosheet Transistors
	5.2: Design and Simulation of Nanosheet Transistors
	5.3: Effects of Sheet Width Variation
	5.4: Effects of Sheet Height Variation
	5.5: Vertically Stacked Lateral Nanosheet Transistors
	5.6: Strain-Engineered NSFETs
	5.7: Variability in NSFETs
	5.8: Modeling of WFV
	5.9: Modeling of Random Dopant Fluctuation
	5.10: Modeling of Random Discrete Dopant
	5.11: Combined Variability (RDD and MGG) in NSFETs
	5.12: Summary
Chapter 6: III-Nitride Flexible Electronic Devices
	6.1: AlxGa1−xN Alloy
	6.2: GaN HEMT Manufacturing Technology
	6.3: Losses in Flexible Substrates
	6.4: Characterization Flexible GaN HEMTs
	6.5: Stress/Strain Analysis in GaN HEMTs
	6.6: Summary
Chapter 7: FDSOI RF Flexible Electronics
	7.1: Potential of SOI-CMOS Technology for Flexible Electronics
	7.2: SmartCut Process
	7.3: RF CMOS SOI Technology
	7.4: SOI CMOS Technology for Flexible Electronics
	7.5: SOI RF-MOSFET Characterization
	7.6: Simulation of FDSOI RF MOSFETs
	7.7: Strain Engineering in RF Flexible CMOS
	7.8: Piezoresistivity
	7.9: Performance of Deformed RF CMOS Transistors
	7.10: Summary
Chapter 8: Simulation at Atomic Scale
	8.1: Semiconductors at Atomic Level
		8.1.1: Single and Multi-Electron System
		8.1.2: Molecules
	8.2: Elementary Particles and Nuclear Models
	8.3: Models for Electron Dynamics
	8.4: Ab-Initio Calculation: DFT and SIESTA Models
		8.4.1: Case Study 1: Carbon Nanostructure Fullerenes (C60) and Nanotubes
		8.4.2: Case Study 2: Properties of Nanotube
		8.4.3: Case Study 3: The Electronic States in Finite Nanotube
	8.5: Time-Dependent Density Functional Theory
	8.6: Electron–Phonon Collision
	8.7: Particle Dynamics for Metallic and Semiconductor Nanostructure
	8.8: Ab-Initio to Circuit Simulation: Roadmap of First-Principle Calculation
	8.9: Numerical Techniques (Algorithms) for Atomistic Simulation
	8.10: Semiclassical Ballistic Transport: Atomistic Simulation Methodology
		8.10.1: Semiclassical Transport
		8.10.2: Why Do We Need Atomistic Simulation?
	8.11: Atomic-Scale Modeling in Advanced Semiconductor Design and Manufacturing
	8.12: Atomistic Kinetic MC Simulation
	8.13: Atomistic Simulation for Semiconductor Devices
	8.14: BTE Solver
	8.15: Simulation Strategy beyond the End of Technology Roadmap
	8.16: Bio-Inspired Device and Systems
	8.17: Summary
Index