Designing Bipolar Transistor Radio Frequency Integrated Circuits (Artech House Microwave Library)

Designing Bipolar Transistor Radio Frequency Integrated Circuits......Page 2
Contents......Page 8
Acknowledgments......Page 12
CHAPTER 1 Introduction......Page 14
References......Page 24
2.1 Cellular/PCS Handsets......Page 26
2.2 Cellular/PCS Infrastructure......Page 28
2.3 WLANs......Page 29
2.4 Bluetooth......Page 30
2.5 UWB......Page 31
2.6 WiMax......Page 32
2.8 Cognitive Radio......Page 33
2.9 Spectrum Allocation in the United States (All Frequencies in Megahertz)......Page 34
2.10 Physical Layer Standards......Page 35
References......Page 37
3.1 I/Q Receivers......Page 38
3.2 I/Q Modulators......Page 43
3.3 Nonzero IF Receivers......Page 45
3.4 Zero IF Receivers......Page 50
References......Page 54
4.1 Transistor Structures......Page 56
4.2 Device Models......Page 58
4.3 Passive Structures, Their Electrical Models, and Layout Design Rules......Page 61
4.4 Maximum Electrical Ratings......Page 80
References......Page 83
5.1 SiGe HBT Transistor Structures......Page 84
5.2 Transistor Device Models......Page 92
5.3 Passive Device Structures and Models......Page 94
5.5 CAD Layout......Page 99
References......Page 100
6.1 Low-Pass Filters......Page 102
6.3 Band-Pass Filters......Page 106
6.4 Differential Filters......Page 108
6.6 Splitters/Dividers......Page 112
6.7 Phase Shifters and Baluns......Page 115
References......Page 117
7.1 Matching Techniques......Page 118
7.3 Fano’s Limit......Page 119
7.4 Stability......Page 120
7.6 Differential Amplifiers......Page 122
7.7 Cascode Amplifiers......Page 124
References......Page 126
8.1 Noise Figure Concepts......Page 128
8.2 Noise Temperature......Page 129
8.4 Multistage Noise Figure Contributions......Page 130
8.5 Circuit Topologies for Low Noise......Page 131
8.6 Design Example 1: Single-Ended PCS LNA......Page 139
8.7 Design Example 2: Three-Transistor Hybrid Darlington Differential LNA Using SiGe Technology......Page 140
References......Page 145
CHAPTER 9 Power Amplifier Design......Page 146
9.1 Loadline Concepts......Page 147
9.2 Maximum Power and Efficiency......Page 149
9.3 Class AB Power Amplifiers......Page 152
9.4 Definitions of Nonlinear Performance Metrics......Page 154
9.5 Adjacent Channel Power Ratio......Page 158
9.6 Error Vector Magnitude......Page 159
9.7 Circuit Topologies for PAs......Page 160
9.8 Matching Circuit Options......Page 162
9.10 Bias Circuits......Page 163
9.11 Design Example 3: Wideband Gain Block Darlington Amplifier......Page 167
9.12 Design Example 4: Feedback Power Amplifier Design......Page 177
References......Page 184
10.1 Multistage LNAs......Page 186
10.2 Multistage Power Amplifiers......Page 188
10.4 Active Device Sizing......Page 190
10.5 Design Example 5: A Differential PCS PA......Page 194
References......Page 207
11.1 Mixer Basics......Page 208
11.2 Diode Mixers......Page 210
11.3 Single-Balanced Active Multiplying Mixers......Page 213
11.4 Fully Balanced Active Multiplying Mixers (Gilbert cell)......Page 218
11.5 I/Q Mixers......Page 230
11.6 I/Q Modulators......Page 232
11.7 Design Example 6: Cellular/PCS Downconverting Mixer RFIC......Page 234
References......Page 243
12.1 Frequency Doublers......Page 244
12.2 Frequency Triplers......Page 246
12.3 Frequency Translators......Page 248
References......Page 252
CHAPTER 13 Voltage-Controlled Oscillator Design......Page 254
13.1 Varactor Diode Basics......Page 255
13.2 Negative-Resistance Concepts......Page 261
13.4 Feedback Circuit Topologies for Producing Negative Resistance......Page 265
13.5 Frequency-Temperature Stability......Page 274
13.6 Phase Noise......Page 276
13.7 Quadrature Phase-Shifting Networks......Page 279
13.8 Ring Oscillators......Page 280
13.9 Design Example 7: 802.11a (Wi-Fi A) Differential VCO......Page 285
13.10 Figure of Merit......Page 291
13.11 Electronic Tuning and a Differential VCO Topology......Page 292
References......Page 294
14.2 “On-Chip” versus “Off-Chip” Component Decisions......Page 296
14.3 Minimizing Parasitics......Page 297
14.4 Testability......Page 298
14.5 Types of CAD Systems......Page 299
14.6 Foundry Comparison......Page 300
14.7 Reticle Assembly......Page 302
15.1 Levels of Integration......Page 306
15.2 Single-Ended versus Differential Topologies......Page 307
15.3 Process Technology Choices......Page 308
15.4 Area versus Performance Trade-offs......Page 309
15.5 Electrical Yield......Page 310
15.7 Production Costs......Page 311
Acronyms......Page 314
About the Author......Page 318
Index......Page 320