Computing at the EDGE: New Challenges for Service Provision

Preface
Contents
Introduction
	1 The Internet of Things, Edge Computing and Its Architectures
	2 Challenges for the Operation at the Edge of the Cloud
		2.1 Challenges for the operation of CPUs at the Edge of the Cloud
			2.1.1 Stagnant Power Scaling.
			2.1.2 Variations and Pessimistic Margins
	3 Summary of Chapters in the Book
		3.1 Introduction
		3.2 Challenges on Unveiling Pessimistic Voltage Margins at the System Level
		3.3 Harnessing Voltage Margins for Balanced Energy and Performance
		3.4 Exploiting Reduced Voltage Margins
		3.5 Improving DRAM Energy-efficiency
		3.6 Adoption of New Business Models: Total Cost of Ownership Analysis
		3.7 The Role of Software Engineering
		3.8 Security at the Edge
	4 Conclusion
	References
Challenges on Unveiling Voltage Margins from the Node to the Datacentre Level
	1 Introduction
	2 Supply Voltage Scaling: Challenges and Established Techniques
		2.1 Established Techniques
		2.2 Supply Voltage Scaling
		2.3 System-Level Characterization Challenges
	3 Automated Characterization Framework
		3.1 Initialization Phase
		3.2 Execution Phase
		3.3 Parsing Phase
	4 Fast System-Level Voltage Margins Characterization
		4.1 System Architecture
		4.2 Micro-viruses Description
			4.2.1 L1 Data Cache Micro-virus
			4.2.2 L1 Instruction Cache Micro-virus
			4.2.3 L2 Cache Micro-virus
			4.2.4 L3 Cache Micro-virus
			4.2.5 Arithmetic and Logic Unit (ALU) Micro-virus
			4.2.6 Floating-Point Unit (FPU) Micro-virus
			4.2.7 Pipeline Micro-virus
		4.3 Experimental Evaluation
		4.4 Experimental Evaluation
			4.4.1 SPEC Benchmarks vs. Micro-viruses
		4.5 Observations
	5 Conclusions
	References
Harnessing Voltage margins for Balanced Energy and Performance
	1 Introduction
	2 System Architecture
	3 Measuring Voltage Guard Bands of Server-Grade ARMv8 CPUs
		3.1 Effect Categorization
		3.2 Regions of Operation
		3.3 Vmin Experimental Results
			3.3.1 Process Variation
			3.3.2 Abnormal Behaviors Below Vmin
			3.3.3 Severity Function
		3.4 Suggestions for Undervolting Effects Mitigation
	4 Balancing Energy and Performance
		4.1 Experimental Setup
		4.2 Voltage Margins Identification
			4.2.1 Exposing Safe Vmin Values
			4.2.2 Unsafe Region Investigation
		4.3 Analysis of Vmin Impact Factors
			4.3.1 Impact of Frequency and Core Allocation on Safe Vmin
			4.3.2 Impact of the Workload on Frequency and Core Allocation
		4.4 Performance and Energy Trade-Offs
			4.4.1 Energy Efficiency
			4.4.2 Combined Energy and Performance Considerations
		4.5 Mitigating Energy: A Real System Implementation
			4.5.1 Online Monitoring Daemon
			4.5.2 Evaluation Results
	5 Conclusions
	References
Exploiting Reduced Voltage Margins: From Node- to the Datacenter-level
	1 Introduction
	2 Related Work
	3 Exploiting Workload-Dependent Voltage Margins at the Node Level
		3.1 Hardware Platform
		3.2 Offline Quantification of Voltage Margins
		3.3 Modelling and Estimation of Workload-Dependent Voltage Margins
			3.3.1 Profiling
			3.3.2 Model
			3.3.3 Model Training
		3.4 Extended Dynamic Voltage Scaling
		3.5 Experimental Evaluation
	4 System Reliability When Operating at Reduced Voltage Margins
		4.1 Validation Experiment
		4.2 Effect of Operation at Reduced Voltage Margins on Node MTBF
		4.3 Effects of Operation at Reduced Voltage Margins in Large, Scale-Out Deployments
	5 Exploiting CPU Voltage Margins in Cloud Infrastructures
		5.1 Problem Modelling
			5.1.1 Nodes and CPUs
			5.1.2 Workloads – VMs
			5.1.3 Scheduling
			5.1.4 CPU Allocation to VMs
			5.1.5 Failures
			5.1.6 SLA Violations Cost
			5.1.7 Energy Cost
			5.1.8 Overall Operating Cost
		5.2 VM Scheduling and System Configuration
		5.3 Hardware Characterization
			5.3.1 Voltage Margins
			5.3.2 Failure Probability
			5.3.3 Power
			5.3.4 Performance Sensitivity to Frequency Scaling
		5.4 Experimental Evaluation
	6 Conclusions
	References
Improving DRAM Energy-efficiency
	1 Introduction
		1.1 DRAM Organization and Background
		1.2 Mapping Data to Memory Physical Layout
		1.3 DRAM Operating Parameters
		1.4 DRAM Temperature
		1.5 Workload-Dependent DRAM Behaviour
		1.6 DIMM-to-DIMM Variation
		1.7 DRAM Errors
		1.8 Error Detection and Correction Hardware
	2 Revealing DRAM Refresh Rate Margins
		2.1 Characterization of Workload-Dependent DRAM Error Behaviour
		2.2 A Typical Edge Server
		2.3 Experiments: Workload-Dependent DRAM Error Behaviour
		2.4 Modelling DRAM Error Behaviour
		2.5 Revealing DRAM Operating Margins Using the Workload-Aware DRAM Error Behaviour Model
		2.6 Power Savings
	3 Conclusion
	References
Total Cost of Ownership Perspective of Cloud vs Edge Deployments of IoT Applications
	1 Introduction
	2 Edge Computing
	3 Total Cost of Ownership (TCO)
	4 TCO Benefits of IoT Applications Running at the Edge
	5 Characterization Framework and Micro-server Architecture
	6 Polaris Application Description and Evaluation
		6.1 Polaris Application Requirements
			6.1.1 Availability Requirements
			6.1.2 Latency Requirements
			6.1.3 Accuracy and Security Requirements
			6.1.4 Data Rate/Performance Requirements
		6.2 End-to-End TCO Model and Parameters
		6.3 Characterization Results
		6.4 End-to-End TCO Results
	7 SocialCRM Application Description and Evaluation
		7.1 SocialCRM Application Requirements
			7.1.1 Clients Degree of Satisfaction Requirement
			7.1.2 Availability Requirement
			7.1.3 Execution Time per Client Requirement
		7.2 End-to-End TCO Model and Parameters
		7.3 Characterization Results
		7.4 End-to-End TCO Results
	8 Conclusions
	References
Software Engineering for Edge Computing
	1 Introduction
		1.1 Motivation
		1.2 Contribution
		1.3 Chapter Structure
	2 Background
		2.1 Software Engineering
			2.1.1 Software Process
		2.2 Edge Computing
			2.2.1 Multi-tier Edge Infrastructure and Modular Software
			2.2.2 Standardizing Edge Computing
	3 Related Work
		3.1 Architectures, Infrastructures, and Algorithms for the Edge
		3.2 Software-Defined Networking for the Edge
		3.3 Network Applications for the Edge
		3.4 Edge Computing for Smart Cities
		3.5 Cyber Security and Privacy for the Edge
		3.6 Software Engineering for the Edge
	4 Software-Engineering Aspects of Existing Approaches
		4.1 Software Application and Edge Infrastructure Specification
		4.2 Architecture and Implementation of Software Applications
			4.2.1 Partitioning Software Applications
			4.2.2 Offloading Software Applications
		4.3 Deployment of Software Applications
			4.3.1 QoS Requirements of Software Applications
			4.3.2 Performance of Edge Infrastructure
		4.4 Maintenance of Software Applications
			4.4.1 QoS Requirements of Software Applications
			4.4.2 Performance of Edge Infrastructure
	5 Abstract Software Process for Edge Computing
		5.1 Software Application and Edge Infrastructure Specification
			5.1.1 Specification of Edge-Deployable Modular Software
			5.1.2 Specification of Edge Infrastructure
		5.2 Edge-Deployable Modular Software
			5.2.1 Architecture of Edge-Partitioned Modular Software
			5.2.2 Architecture of Edge-Offloaded Modular Software
		5.3 Microservice Implementation/Test of Modular Software
		5.4 Edge-Eligible Deployment of Service Components
			5.4.1 Edge-Eligible Deployment Plan
			5.4.2 From Deployment Plan to the Deployment to Machines
		5.5 Edge-Enabled Maintenance of Software Applications
			5.5.1 QoS-Based Maintenance of Service Components
			5.5.2 Performance-Driven Maintenance of Edge Infrastructure
	6 Conclusions
	References
Overcoming Wifi Jamming and other security challenges at the Edge
	1 Introduction
	2 Technical Perspectives on Wi-Fi Technology
		2.1 Review of the Theory of Electromagnetic Waves
		2.2 Modulation: Transmitting Information Using Electromagnetic Wave
		2.3 Wi-Fi Channels
	3 Modulation Schemes Used by Wi-Fi
	4 Wi-Fi and Its Attack Vectors
		4.1 Jamming Signals
			4.1.1 Countering Jamming Attacks on Wi-Fi Networks
		4.2 The 802.11 Frame Structure
		4.3 Frame Types
		4.4 Beacon Frames
	5 Detecting Wi-Fi Jamming at the Edge
		5.1 SME Security Business Considerations
		5.2 State of the Art
		5.3 WDOS Application
		5.4 TCO Introduction
	6 Physical Attacks on Edge Deployments
		6.1 Memory Attacks
		6.2 Timing Attacks
		6.3 DRAM Attacks
		6.4 Attacking Encryption keys
			6.4.1 Power Analysis Attacks
			6.4.2 Electromagnetic Attacks
	7 Conclusions
	References
Index