CMOS : front-end electronics for radiation sensors

Content: Preface    Acknowledgments    List of Tables    About the Author    Front-End Specifications and Architecture Overview    Basic Features and Electrical Modeling of Radiation Sensors    Signal Formation in Detectors    Signal Polarity    Space Resolution and Detector Segmentation    Amplitude and Signal Shape Fluctuations    Sensor Capacitance    Leakage Current    Sensor Equivalent Circuit    Modeling of Composite Systems    Examples of Radiation Sensors    Key Parameters in Front-End Electronics    A First Front-End Amplifier    Peaking Time    Gain and Signal Polarity    Noise    Time Resolution    Pile-Up    Detection Efficiency and Derandomization    Front-End Architectures    Binary Front-End    Counting and Time-Over-Threshold Architectures    Time Pick-Off Systems    Sample and Hold and Peak Detectors    Analog Memories    Real Time Waveform Digitizers    Data Readout and Transmission    References    MOS Transistor Properties    Silicon Properties    Silicon Band Structure    Doping    Charge Transport in Silicon    Charge Transport by Drift    Mobility in Doped Silicon    Charge Transport by Diffusion    Einstein Relationship    Graded Doping    pn Junctions    Built-In Voltage    Depletion Region    Breakdown Voltage    Junction Capacitance    Contact Potentials    A First Look at MOS Transistors    The NMOS Transistors    The PMOS Transistors    Transistor Representations    CMOS Technologies    CMOS Radiation Sensors    Electrical Characteristics of MOS Transistors    The Threshold Voltage    Regions of Operation of the MOS Transistor    MOS Characteristics in the Linear Region    MOS Characteristics in Saturation    The Body Effect     MOS Capacitance     The PMOS Transistor    MOS Small Signal Parameters    Gate Transconductance    Bulk Transconductance    Output Conductance    MOS Small Signal Model    Weak and Moderate Inversion    The Deep Submicron MOS Transistor    Scaling Methods    Mobility Reduction    Velocity Saturation    Drain-Induced Barrier Lowering    Hot Carrier Effects    Gate Leakage Current    References    Input Stages    Transimpedance Amplifiers     The Transimpedance Amplifier as a Feedback Circuit     Common Source Amplifiers     Common Source Amplifier with Resistive Load     Current Mirrors    Common Source Amplifiers with Active Load    Source Degenerated Common Source Amplifiers    Feedback in Source Degenerated Amplifiers     Output Impedance of the Source Degenerated Amplifier    Cascode Amplifiers     Cascode Current Mirrors     Wide-Swing Current Mirrors     Telescopic Cascode Amplifiers     Folded Cascode    Unbuffered Transresistance Amplifiers    Source Followers    Buffered Cascode Amplifiers    Amplifiers with Rail-to-Rail Output Stage    Gain Boosting     Current Mode Input Stages    References    Input Stages in the Frequency Domain    The Common Source Amplifier in the Frequency Domain    Voltage Driven Common Source Amplifier     Current Driven Common Source Amplifier     Analysis of the Common Source Amplifier with the Miller Theorem    Frequency Performance of Cascode Amplifiers    Frequency Stability of Amplifiers    Feedback and Frequency Compensation of CMOS OTA    Phase Margin    Frequency Compensation     Effect of the Right-Half Plane Zero    Advanced Compensation Techniques     Frequency Stability and Compensation of Front-End Amplifiers    Transimpedance Amplifier with Ideal Output Buffer     Input Impedance     Transimpedance Amplifier with Real Output Buffer    Input Stages with Gain Boosting     The Charge Sensitive Amplifier    Frequency Performance of Current Mode Input Stages     References    Noise    Fundamental Concepts    Thermal and Shot Noise Spectral Density    Thermal Noise     Shot Noise    Noise in MOS Transistors     Channel Thermal Noise in MOS Transistors     Flicker Noise    Noise Calculations in Circuits     Noise in an RC Low-Pass Filter     Noise in a Single-Stage Front-End     Noise Filtering and Optimization of the Signal-to-Noise Ratio     The Matched Filter     Optimum Filter for Energy Measurements     Optimum Filter for Timing Measurements     References    Time Invariant Shapers    Ideal Charge Sensitive Amplifiers     The CR-RC Shaper     CR-RCn Shapers     Shapers with Complex Conjugate Poles     Noise Calculations in Time Invariant Shapers     Noise in CR-RC Shapers     Noise Calculations in CR-RCn Shapers     Noise Slope    Effect of 1/ fa Noise     Alternative Formalism for Noise Calculations    Noise Simulations    Pole-Zero Cancellation and Baseline Control    Pole-Zero Cancellation    Baseline Holders and Baseline Restorers     Baseline Restorers    Bipolar Shapers     Front-End with Transimpedance Input Stage     Gain and Bandwidth Limitations in Charge Sensitive Amplifiers    Effects of Finite Gain in the CSA    Effect of CSA Bandwidth Limitation     Effect of Finite Charge Collection Time    References    Time Variant Shapers    Ballistic Deficit and the Gated Integrator    Noise Analysis in the Time Domain     Time-Domain Noise Analysis of the CR-RC Filter    Time-Domain Noise Analysis of the Gated Integrator     Correlated Double Sampling     Time-Variant Filters in CMOS Technology    References    Transistor-Level Front-End Design    Transistor-Level Design of Charge Sensitive Amplifiers    Optimization of the Input Transistor     Load Design    Choice of Input Transistor Type    Passive Feedback Networks    Integrated Capacitors     Passive Resistors     Active Feedback Networks     Feedback Transistors in Linear Region     Transconductance Feedback     Feedback with DC Current Compensation    Constant Current Feedback     Power Supply Rejection    Implementation of Shaping Amplifiers    Single Stage Shapers     Multi-Stage Shapers     Active Shaping Networks    OTA-C Shapers    Compact Shaping Cells     Baseline Holder Design     Fully Differential Front-End    Implementation of Current Mode Front-Ends     References    Discriminators    Basic Discriminator Properties     Discriminator Gain and Speed Requirements    Discriminator Threshold Setting    General Purpose Voltage Discriminators    Two-Stage Discriminators     Discriminator with Cross-Coupled Loads     High-Speed Discriminators    Timing Discriminators     Jitter and Rise Time Variations     Time Walk     Leading-Edge Discriminators    Zero Crossing Discriminators    Constant Fraction Discriminators    Latched Comparators     Mismatch in CMOS Transistors    Mismatch due to Local Fluctuations     Mismatch Calculations in Circuits     Offset Compensation in Discriminators    Current Mode Discriminators    References    Data Converters    Basic ADC Properties     ADC Static Performance     ADC Dynamic Performance    ADC Architectures    Flash ADC     Single Ramp and Wilkinson ADC    Successive Approximation Register ADC (SAR ADC)    Conventional SAR ADC    Key Issues in SAR ADC Design    Low-Power SAR ADC Design    Basic TDC Properties    TDC Architectures     TDC with Analog Interpolators     TDC with Digital Delay Lines    Loop-Based TDC     Ring Oscillator TDC    Pulse Shrinking TDC    References    Appendix: Differential and Operational Amplifiers    Differential and Common Mode Signals     Differential Cell Large-Signal Behavior     Differential Cell Small-Signal Analysis     Differential Cells with Active Load     Differential Cell with Current Mirror Load    Operational Amplifiers    Single Stage Architectures     Two-Stage OTA     OTA with Class AB Output     OTA with Rail-to-Rail Input Stages     Fully Differential Amplifiers    References    Appendix: Practical Aspects in Front-End Design    The Front-End Design Cycle    Substrate Noise in Mixed-Signal ASICs    Off-Chip Data Transmission and LVDS I/O Ports     Bias Distribution in Multi-Channel Front-Ends     Front-End Calibration    Radiation Damage    References    Index