Architecture of Computing Systems – ARCS 2018

Front Matter ....Pages I-XV
Front Matter ....Pages 1-1
 Trade-Off Between Performance, Fault Tolerance and Energy Consumption in Duplication-Based Taskgraph Scheduling  (Patrick Eitschberger, Simon Holmbacka, Jörg Keller)....Pages 3-17
 Lipsi: Probably the Smallest Processor in the World  (Martin Schoeberl)....Pages 18-30
 Superlinear Scalability in Parallel Computing and Multi-robot Systems: Shared Resources, Collaboration, and Network Topology  (Heiko Hamann)....Pages 31-42
Front Matter ....Pages 43-43
 Closed Loop Controller for Multicore Real-Time Systems  (Johannes Freitag, Sascha Uhrig)....Pages 45-56
 Optimization of the GNU OpenMP Synchronization Barrier in MPSoC  (Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau)....Pages 57-69
Front Matter ....Pages 71-71
 Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes  (Achim Lösch, Alex Wiens, Marco Platzner)....Pages 73-84
 A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model  (Sebastian Rachuj, Christian Herglotz, Marc Reichenbach, André Kaup, Dietmar Fey)....Pages 85-96
Front Matter ....Pages 97-97
 A CAM-Free Exascalable HPC Router for Low-Energy Communications  (Caroline Concatto, Jose A. Pascual, Javier Navaridas, Joshua Lant, Andrew Attwood, Mikel Lujan et al.)....Pages 99-111
 Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips  (Martin Frieb, Alexander Stegmeier, Jörg Mische, Theo Ungerer)....Pages 112-126
 Network Optimization for Safety-Critical Systems Using Software-Defined Networks  (Cora Perner)....Pages 127-138
 CaCAO: Complex and Compositional Atomic Operations for NoC-Based Manycore Platforms  (Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild, Andreas Herkersdorf)....Pages 139-152
Front Matter ....Pages 153-153
 Redundant Execution on Heterogeneous Multi-cores Utilizing Transactional Memory  (Rico Amslinger, Sebastian Weis, Christian Piatka, Florian Haas, Theo Ungerer)....Pages 155-167
 Improving the Performance of STT-MRAM LLC Through Enhanced Cache Replacement Policy  (Pierre-Yves Péneau, David Novo, Florent Bruguier, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié)....Pages 168-180
 On Automated Feedback-Driven Data Placement in Multi-tiered Memory  (T. Chad Effler, Adam P. Howard, Tong Zhou, Michael R. Jantz, Kshitij A. Doshi, Prasad A. Kulkarni)....Pages 181-194
 Operational Characterization of Weak Memory Consistency Models  (M. Senftleben, K. Schneider)....Pages 195-208
Front Matter ....Pages 209-209
 A Tightly Coupled Heterogeneous Core with Highly Efficient Low-Power Mode  (Yasumasa Chidai, Kojiro Izuoka, Ryota Shioya, Masahiro Goshima, Hideki Ando)....Pages 211-224
 Performance-Energy Trade-off in CMPs with Per-Core DVFS  (Solomon Abera, M. Balakrishnan, Anshul Kumar)....Pages 225-238
 Towards Fine-Grained DVFS in Embedded Multi-core CPUs  (Giuseppe Massari, Federico Terraneo, Michele Zanella, Davide Zoni)....Pages 239-251
Front Matter ....Pages 253-253
 Evaluating Auto-adaptation Methods for Fine-Grained Adaptable Processors  (Joost Hoozemans, Jeroen van Straten, Zaid Al-Ars, Stephan Wong)....Pages 255-268
 HLS Enabled Partially Reconfigurable Module Implementation  (Nicolae Bogdan Grigore, Charalampos Kritikakis, Dirk Koch)....Pages 269-282
 Hardware Acceleration in Genode OS Using Dynamic Partial Reconfiguration  (Alexander Dörflinger, Mark Albers, Björn Fiethe, Harald Michalik)....Pages 283-293
Front Matter ....Pages 295-295
 Do Iterative Solvers Benefit from Approximate Computing? An Evaluation Study Considering Orthogonal Approximation Methods  (Michael Bromberger, Markus Hoffmann, Robin Rehrmann)....Pages 297-310
 A Flexible FPGA-Based Inference Architecture for Pruned Deep Neural Networks  (Thorbjörn Posewsky, Daniel Ziener)....Pages 311-323
Back Matter ....Pages 325-326