Advanced Computer Architectures

Content: Cover
 Half Title
 Title Page
 Copyright Page
 Dedication
 Preface
 The Author
 Table of Contents
 Introduction
 I.1 Computing Paradigms
 I.2 The Need for Advanced Architectures
 I.2.1 Hardware
 I.2.2 Software
 I.2.3 Systems
 I.3 Book Overview
 References
 1: Uniprocessor Architecture Overview
 1.1 Uniprocessor Model
 1.2 Enhancements to the Uniprocessor Model
 1.2.1 Arithmetic Logic Unit
 1.2.2 Memory
 1.2.3 Control Unit
 1.2.4 I/O Subsystem
 1.2.5 Interconnection Structures
 1.2.6 System Considerations
 1.3 Example Systems
 1.3.1 Intel Corporation's Itanium. 1.3.2 MIPS Computer System's R100001.4 Summary
 Problems
 References
 2: Models and Terminology
 2.1 Effect of Application on the Architecture
 2.2 Application Characteristics
 2.3 Processing Paradigms
 2.4 Flynn's Taxonomy
 2.4.1 Single Instruction Stream, Multiple Data Stream
 2.4.2 Multiple Instruction Stream, Multiple Data Stream
 2.5 Computer Networks
 2.6 Performance Evaluation
 2.6.1 Benchmarks
 2.7 Cost Factor
 2.8 Summary
 Problems
 References
 3: Pipelining
 3.1 Pipeline Model
 3.1.1 Pipeline Types
 3.2 Pipeline Control and Performance
 3.2.1 Collision Vectors
 3.2.2 Control. 3.2.3 Performance3.2.4 Multifunction Pipelines
 3.3 Other Pipeline Problems
 3.3.1 Data Interlocks
 3.3.2 Conditional Branches
 3.3.3 Multiple Instruction Buffers
 3.3.4 Interrupts
 3.4 Dynamic Pipelines
 3.4.1 Instruction Deferral
 3.4.2 Performance Evaluation
 3.5 Example Systems
 3.5.1 Control Data Corporation STAR-100
 3.5.2 Control Data Corporation 6600
 3.5.3 Sun Microsystem's Niagara Microprocessor
 3.6 Summary
 Problems
 References
 4: Vector Processors
 4.1 Vector Processor Models
 4.2 Memory Design Considerations
 4.3 Architecture of the Cray Series
 4.3.1 Memory. 4.3.2 Processor Interconnection4.3.3 Central Processor
 4.3.4 I/O System
 4.3.5 Other Systems in the Series
 4.4 Performance Evaluation
 4.5 Programming Vector Processors
 4.6 Example Systems
 4.6.1 Hitachi Super Technical Server
 4.6.2 NEC SX Series
 4.6.3 Cray X1
 4.7 Summary
 Problems
 References
 5: Array Processors
 5.1 SIMD Organization
 5.1.1 Memory
 5.1.2 Control Processor
 5.1.3 Arithmetic/Logic Processors
 5.1.4 Interconnection Network
 5.1.5 Registers, Instruction Set, Performance Considerations
 5.2 Data Storage Techniques and Memory Organization
 5.3 Interconnection Networks. 5.3.1 Terminology and Performance Measures5.3.2 Routing Protocols
 5.3.3 Static Topologies
 5.3.4 Dynamic Topologies
 5.4 Performance Evaluation and Scalability
 5.5 Programming SIMDs
 5.6 Example Systems
 5.6.1 ILLIAC-IV
 5.6.2 Thinking Machine Corporation's CM-2
 5.7 Summary
 Problems
 References
 6: Multiprocessor Systems
 6.1 MIMD Organization
 6.1.1 Shared-Memory Architecture
 6.1.2 Message-Passing Architecture
 6.1.3 Other Models
 6.2 Memory Organization
 6.2.1 Cache Coherence
 6.3 Interconnection Networks
 6.3.1 Bus Network
 6.3.2 Loop or Ring
 6.3.3 Mesh Network.