دسترسی نامحدود
برای کاربرانی که ثبت نام کرده اند
دانلود کتاب A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems
دانلود کتاب راهنمای عملی Verilog-A: تسلط بر زبان مدلسازی برای دستگاهها، مدارها و سیستمهای آنالوگ
مشخصات کتاب
A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems
ویرایش: 1
نویسندگان: Slobodan Mijalković
سری:
ISBN (شابک) : 1484263502, 9781484263501
ناشر: Apress
سال نشر: 2022
تعداد صفحات: 340
زبان: English
فرمت فایل : PDF (درصورت درخواست کاربر به PDF، EPUB یا AZW3 تبدیل می شود)
حجم فایل: 3 مگابایت
قیمت کتاب (تومان) : 85,000
در صورت تبدیل فایل کتاب A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits, and Systems به فرمت های PDF، EPUB، AZW3، MOBI و یا DJVU می توانید به پشتیبان اطلاع دهید تا فایل مورد نظر را تبدیل نمایند.
توجه داشته باشید کتاب راهنمای عملی Verilog-A: تسلط بر زبان مدلسازی برای دستگاهها، مدارها و سیستمهای آنالوگ نسخه زبان اصلی می باشد و کتاب ترجمه شده به فارسی نمی باشد. وبسایت اینترنشنال لایبرری ارائه دهنده کتاب های زبان اصلی می باشد و هیچ گونه کتاب ترجمه شده یا نوشته شده به فارسی را ارائه نمی دهد.
توضیحاتی درمورد کتاب به خارجی
فهرست مطالب
1 Table of Contents About the Author About the Technical Reviewer Acknowledgments Introduction 978-1-4842-6351-8.webp 978-1-4842-6351-8_1 Chapter 1: Lexical Basis Character Set and Tokens Comments Identifiers Simple Identifiers Escaped Identifiers Hierarchical Names Reserved Words System Names Compiler Directives Numerical Literals Integer Literals Real Literals String Literals Operators Punctuators 978-1-4842-6351-8_2 Chapter 2: Basic Types and Expressions Basic Types Integer Types Real Types String Types Expressions Primary Expressions Call Expressions Subscript Expressions Arithmetic Expressions Relational Expressions Logical Expressions Bitwise Expressions Conditional Expressions Concatenated Expressions Expression Evaluation Order Operator Precedence Parenthesized Expressions Short-Circuit Evaluation Expression Containers Assignment Patterns Ranges 978-1-4842-6351-8_3 Chapter 3: Net-Discipline Types Defining Signal Natures Base Natures Derived Natures Predefined Natures Defining Net-Discipline Types Nature Binding Statements Domain Binding Statements Nature Override Statements Deriving Natures from Disciplines Discipline Compatibility Predefined Disciplines Net Declarations Scalar Nets Vector Nets Ground Nets Net Initialization Accessing Net Attributes 978-1-4842-6351-8_4 Chapter 4: Modules and Ports Defining Module Connectivity Declaring Port Directions Declaring Port Types Connecting Modules by Instantiation Explicit Port Mapping Positional Port Mapping Top-Level Instantiation and $root Implicit Nets Instantiation of SPICE Primitives 978-1-4842-6351-8_5 Chapter 5: Parameters Parameter Declarations Simple Parameters Array Parameters Permissible Value Ranges Parameter Aliases Local Parameters Overriding Parameters Instance Parameter Override Parameter Override by Name Parameter Override by Order Hierarchical Parameter Override Hierarchical System Parameters 978-1-4842-6351-8_6 Chapter 6: Paramsets Introducing Paramsets Defining Paramsets Paramset Parameters Parameter Override Statements Other Paramset Statements Paramset Instantiation 978-1-4842-6351-8_7 Chapter 7: Procedural Programming Variables Simple Variables Array Variables Procedural Blocks Analog Blocks Block Procedural Statements Assignment Statements Scalar Assignments Array Assignments Conditional Statements if Statement case Statement Looping Statements while Statement for Statement repeat Statement 978-1-4842-6351-8_8 Chapter 8: Branches Declaring Branches Scalar Branches Vector Branches Port Branches Branch Signals Signal Directions Signal Access Functions Unnamed Branches Contributing Branch Signals Direct Contribution Statements Indirect Contribution Statements Probe Branches Value Retention Switch Branches 978-1-4842-6351-8_9 Chapter 9: Derivative and Integral Operators Time Derivative Operator Case Study: DC Motor Time Integrator Operator Case Study: Chemical Reaction System Circular Integrator Operator Case Study: Voltage-Controlled Oscillator Indirect Contribution Equations Case Study: Accelerometer Probe Derivative Operator 978-1-4842-6351-8_10 Chapter 10: Built-In Math Functions Deterministic Functions Logarithmic and Power Functions Trigonometric Functions Hyperbolic Functions Limiting and Rounding Functions Probabilistic Functions Random Number Generation Function Statistical Distribution Functions 978-1-4842-6351-8_11 Chapter 11: User-Defined Functions Defining Functions Formal Arguments A Return Variable A Procedural Statement Calling Functions Function References Using Functions in Expressions Function Called As Statements 978-1-4842-6351-8_12 Chapter 12: Lookup Tables Table Data Structure Jagged Array Grids Preparing Table Data Lookup Table Function Input Variables and Data Source Control String 978-1-4842-6351-8_13 Chapter 13: Small-Signal Functions AC Analysis AC Stimulus Function Noise Analysis White Noise Function Flicker Noise Function Look-Up Table Noise Functions Correlated Noise Sources 978-1-4842-6351-8_14 Chapter 14: Filters Time-Domain Filters Absolute Delay Filter Transition Filter Slew Filter Frequency-Domain Filters Laplace Transform Filters Zero-Pole Filter Zero-Denominator Filter Numerator-Pole Filter Numerator-Denominator Filter The Z-Transform Filters Zero-Pole Filter Zero-Denominator Filter Numerator-Pole Filter Numerator-Denominator Filter 978-1-4842-6351-8_15 Chapter 15: Events Event Control Statements Global Event Functions Monitored Event Functions Cross Function Last Crossing Function Above Function Timer Function 978-1-4842-6351-8_16 Chapter 16: Runtime Support Elaboration Queries Port Connections Parameter Overrides Simulation Queries Analysis Type Kernel Parameters Dynamic Probing Solver Support Announcing Discontinuity Bounding Time Step Limiting Iteration Steps Simulation Control Announcing Severity Terminating Simulation 978-1-4842-6351-8_17 Chapter 17: Input and Output File Management Opening Files File Positioning Error Status Detecting End-of-File Flushing Output Closing Files Reading Data Reading a Line from a File Reading Formatted Data Displaying and Writing Data Text Output File Output Writing Data to a String Escape Sequences 978-1-4842-6351-8_18 Chapter 18: Generative Programming Generate Blocks Generate Statements Generate Regions Conditional Generation Looping Generation Hierarchy Scope and Names Order of Elaboration 978-1-4842-6351-8_19 Chapter 19: Attributes Introducing Attributes Attribute Assignments Attribute Instances Standard Attributes Simulation Reports Output Variables Port Discipline Override 978-1-4842-6351-8_20 Chapter 20: Compiler Directives File Inclusion Macro Definition Object-like Macros Function-like Macros Undefining Macros Predefined Macros Conditional Compilation Default Transition Directive 978-1-4842-6351-8_21 Appendix Reserved Words in Verilog-A Keywords Other Reserved Words SPICE Compatibility Index
