VLSI Design and Test: 22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers

Front Matter ....Pages I-XVIII
Front Matter ....Pages 1-1
 Efficient Hardware-Software Codesigns of AES Encryptor and RS-BCH Encoder  (M. Mohamed Asan Basiri, Sandeep K. Shukla)....Pages 3-15
 High Level Synthesis and Implementation of Cryptographic Algorithm in AHIR Platform  (Abhimanniu Raveendran, Sanjay Dhok, Rajendra Patrikar)....Pages 16-27
 A Hardware Accelerator for Convolutional Neural Network Using Fast Fourier Transform  (S. Kala, Babita R. Jose, Debdeep Paul, Jimson Mathew)....Pages 28-36
 Reconfigurable VLSI-Architecture of Multi-radix Maximum-A-Posteriori Decoder for New Generation of Wireless Devices  (Rahul Shrestha, Ashutosh Sharma)....Pages 37-48
 Design of High Speed 5:2 and 7:2 Compressor Using Nanomagnetic Logic  (Shantanu Agarwal, G. Harish, S. Balamurugan, R. Marimuthu)....Pages 49-60
 A Comparative Exploration About Approximate Full Adders for Error Tolerant Applications  (M. Priyadharshni, S. Kumaravel)....Pages 61-74
Front Matter ....Pages 75-75
 A PVT Insensitive Low-Power Differential Ring Oscillator  (Nishtha Wadhwa, Pydi Ganga Bahubalindruni, Sujay Deb)....Pages 77-87
 Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power  (Prateek Gupta, Shubham Kumar, Zia Abbas)....Pages 88-99
 A 31 ppm/\(^{\circ }\)C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier  (R. Nagulapalli, K. Hayatleh, S. Barker, S. Zourob, N. Yassine, B. Naresh Kumar Reddy)....Pages 100-108
 Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region  (Vineysarathi Kokkula, Akash Joshi, Raghvendra Deshmukh)....Pages 109-120
 CMOS Implementations of Rectified Linear Activation Function  (P. Priyanka, G. K. Nisarga, S. Raghuram)....Pages 121-129
 Voltage Level Adapter Design for High Voltage Swing Applications in CMOS Differential Amplifier  (Ashfakh Ali, Arpan Jain, Zia Abbas)....Pages 130-139
 Layout Design of X-Band Low Noise Amplifier for Radar Applications  (I. Stefigraf, S. Rajaram)....Pages 140-156
Front Matter ....Pages 157-157
 A Novel Approach to Detect Hardware Malware Using Hamming Weight Model and One Class Support Vector Machine  (P. Saravanan, B. M. Mehtre)....Pages 159-172
 Detecting Hardware Trojans by Reducing Rarity of Transitions in ICs  (Tapobrata Dhar, Surajit Kumar Roy, Chandan Giri)....Pages 173-185
 Enhanced Logical Locking for a Secured Hardware IP Against Key-Guessing Attacks  (R. Sree Ranjani, M. Nirmala Devi)....Pages 186-197
 SARP: Self Aware Runtime Protection Against Integrity Attacks of Hardware Trojans  (Krishnendu Guha, Debasri Saha, Amlan Chakrabarti)....Pages 198-209
 A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations  (Jai Gopal Pandey, Tarun Goel, Mausam Nayak, Chhavi Mitharwal, Sajid Khan, Santosh Kumar Vishvakarma et al.)....Pages 210-220
 Efficient Data Compression Scheme for Secured Application Needs  (Ravi Kashyap, Twinkle Verma, Priyanka Kwatra, Sidhartha Sankar Rout)....Pages 221-230
Front Matter ....Pages 231-231
 Effective Method for Temperature Compensation in Dual Band Metal MEMS Resonator  (Amol Morankar, Rajendra Patrikar)....Pages 233-241
 Deadlock Detection in Digital Microfluidics Biochip Droplet Routing  (Jyotiranjan Swain, Sumanta Pyne)....Pages 242-253
 Fabrication of Molybdenum MEMs Structures Using Dry and Wet Etching  (Sandeep Singh Chauhan, Niharika J, M. M. Joglekar, S. K. Manhas)....Pages 254-263
 Continuous Flow Microfluidic Channel Design for Blood Plasma Separation  (Jagriti Srivastava, Rajendra Patrikar)....Pages 264-277
 Real Time Mixing Index Measurement of Microchannels Using OpenCV  ( Khuushi, Vanadana Jain, Rajendra Patrikar, Raghavendra Deshmukh)....Pages 278-284
 Novel RF MEMS Capacitive Switch for Lower Actuation Voltage  (Sagar B. Dhule, Vasu Pulijala)....Pages 285-294
Front Matter ....Pages 295-295
 A Novel Countermeasure Against Differential Scan Attack in AES Algorithm  (Jayesh Popat, Usha Mehta)....Pages 297-309
 Optimization of Test Wrapper Length for TSV Based 3D SOCs Using a Heuristic Approach  (Tanusree Kaibartta, Debesh Kumar Das)....Pages 310-321
 A Methodology to Design Online Testable Reversible Circuits  (Mrinal Goswami, Govind Raj, Aron Narzary, Bibhash Sen)....Pages 322-334
 Robust SRAM Cell Development for Single-Event Multiple Effects  (Naga Raghuram CH, D. Manohar Reddy, Puli Kishore Kumar, Gaurav Kaushal)....Pages 335-347
 Automation of Timing Quality Checks and Optimization  (Dubakula Ketavanya, Anand D. Darji)....Pages 348-356
Front Matter ....Pages 357-357
 Temperature Insensitive Low-Power Ring Oscillator Using only n-type Transistors  (Nishtha Rai, Vaibhav Agarwal, Nishtha Wadhwa, Bhawna Tiwari, Pydi Ganga Bahubalindruni)....Pages 359-369
 Low-Power Switched Operational Amplifier Using a-InGaZnO TFTs  (Suprateek Shukla, Bhawna Tiwari, Nishtha Wadhwa, Pydi Ganga Bahubalindruni, Pedro Barquinha)....Pages 370-379
 Threshold Voltage Investigation of Recessed Dual-Gate MISHEMT: Simulation Study  (Preeti Singh, Vandana Kumari, Manoj Saxena, Mridula Gupta)....Pages 380-393
 LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits  (Zia Abbas, Andleeb Zahra, Mauro Olivieri)....Pages 394-407
 Performance Optimization of FinFET Configurations at 14 nm Technology Using ANN-PSO  ( Srishti, Jasmeet Kaur)....Pages 408-417
 Performance Analysis of Graphene Based Optical Interconnect at Nanoscale Technology  (Balkrishna Choubey, Vijay Rao Kumbhare, Manoj Kumar Majumder)....Pages 418-429
Front Matter ....Pages 431-431
 Heuristic Driven Genetic Algorithm for Priority Assignment of Real-Time Communications in NoC  (Ajay Khare, Chinmay Patil, Manikanta Nallamalli, Santanu Chattopadhyay)....Pages 433-445
 A Novel Fault-Tolerant Routing Algorithm for Mesh-of-Tree Based Network-on-Chips  (Monil Shah, Mohit Upadhyay, P. Veda Bhanu, J. Soumya, Linga Reddy Cenkeramaddi)....Pages 446-459
 Performance Enhancement of NoCs Using Single Cycle Deflection Routers and Adaptive Priority Schemes  (K. S. Midhula, Sarath Babu, John Jose, Sangeetha Jose)....Pages 460-472
 3D LBDR: Logic-Based Distributed Routing for 3D NoC  (Ashish Sharma, Manish Tailor, Lava Bhargava, Manoj Singh Gaur)....Pages 473-482
 Parameter Extraction of PSP MOSFET Model Using Particle Swarm Optimization - SoC Approach  (Amit Rathod, Rajesh Thakker)....Pages 483-494
 Implementation of a Novel Fault Tolerant Routing Technique for Mesh Network on Chip  (Akshay B. P., Ganesh K. M., Thippeswamy D. R., Vishnu S. Bhat, Anitha Vijayakumar, Ananda Y. R. et al.)....Pages 495-506
Front Matter ....Pages 507-507
 Efficient and Failure Aware ECC for STT-MRAM Cache Memory  (Keerthi Sagar Kokkiligadda, Yogendra Gupta, Lava Bhargava)....Pages 509-520
 A Novel Design Approach to Implement Multi-port Register Files Using Pulsed-Latches  (T. S. Manivannan, Meena Srinivasan)....Pages 521-537
 Low Leakage Noise Tolerant 10T SRAM Cell  (Vinay Gupta, Pratiksha Shukla, Manisha Pattanaik)....Pages 538-550
 A Write-Improved Half-Select-Free Low-Power 11T Subthreshold SRAM with Double Adjacent Error Correction for FPGA-LUT Design  (Vishal Sharma, Pranshu Bisht, Abhishek Dalal, Shailesh Singh Chouhan, H. S. Jattana, Santosh Kumar Vishvakarma)....Pages 551-564
 Low Leakage Read Write Enhanced 9T SRAM Cell  (Pratiksha Shukla, Vinay Gupta, Manisha Pattanaik)....Pages 565-577
 A Novel March C2RR Algorithm for Nanoelectronic Resistive Random Access Memory (RRAM) Testing  (H. Sribhuvaneshwari, K. Suthendran)....Pages 578-589
Front Matter ....Pages 591-591
 A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture  (Anirban Bhattacharjee, Chandan Bandyopadhyay, Laxmidhar Biswal, Hafizur Rahaman)....Pages 593-605
 Quantum Domain Design of Clifford+T-Based Bidirectional Barrel Shifter  (Laxmidhar Biswal, Anirban Bhattacharjee, Rakesh Das, Gopinath Thirunavukarasu, Hafizur Rahaman)....Pages 606-618
 Source Hotspot Management in a Mesh Network on Chip  (Ajay S, Satya Sai Krishna Mohan G, Shashank S Rao, Sujay B Shaunak, Krutthika H K, Ananda Y R et al.)....Pages 619-630
 An Energy-Efficient Core Mapping Algorithm on Network on Chip (NoC)  (B. Naresh Kumar Reddy, Sireesha)....Pages 631-640
Front Matter ....Pages 641-641
 Fabrication and LBM-Modeling of Directional Fluid Transport on Low-Cost Electro-Osmotic Flow Device  (T. Pravinraj, Rajendra Patrikar)....Pages 643-656
 Fully Digital, Low Energy Capacitive Sensor Interface with an Auto-calibration Unit  (Chintanika Chothani, Biswajit Mishra)....Pages 657-669
 An Angular Steiner Tree Based Global Routing Algorithm for Graphene Nanoribbon Circuit  (Arindam Sinharay, Subrata Das, Pranab Roy, Hafizur Rahaman)....Pages 670-681
 A Complete Hardware Advent on IEEE 802.15.4 Based Mac Layer and a Comparison with Open-ZB  (Ammu Lakshmy Rajesh, Sanket V. Kadam, Rajendra Patrikar)....Pages 682-694
 Design of CMOS Based Biosensor for Implantable Medical Devices  (G. Gifta, D. Gracia Nirmala Rani, Nifasath Farhana, R. Archana)....Pages 695-704
 Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications  (Saket Thool, Raghavendra Deshmukh, Rajendra Patrikar)....Pages 705-719
Back Matter ....Pages 721-723