PARLE Parallel Architectures and Languages Europe: Volume I: Parallel Architectures Eindhoven, The Netherlands, June 15–19, 1987 Proceedings

Learning translation invariant recognition in a massively parallel networks....Pages 1-13
Trace theory and systolic computations....Pages 14-33
Boltzmann machines and their applications....Pages 34-50
Cobweb-2: Structured specification of a wafer-scale supercomputer....Pages 51-67
A novel deadlock free and starvation free packet switching communication processor....Pages 68-85
A parallel architecture for signal understanding through inference on uncertain data....Pages 86-102
An axiomatic approach to the specification of distributed computer architectures....Pages 103-120
Computing on a systolic screen: Hulls, contours and applications....Pages 121-133
Multiprocessor systems programming in a high-level data-flow language....Pages 134-151
The twisted cube....Pages 152-159
An implemented method for incremental systolic design....Pages 160-177
The use of parallel functions in system design....Pages 178-194
The translation of processes into circuits....Pages 195-212
Mapping strategies in message based multiprocessor systems....Pages 213-225
Hardware memory management for large knowledge bases....Pages 226-241
Transputer-based experiments with the ZAPP architecture....Pages 242-259
Synthesis of systolic arrays for inductive problems....Pages 260-277
Practical parallelism using transputer arrays....Pages 278-294
Systolic array synthesis by static analysis of program dependencies....Pages 295-310
Specification of a pipelined event driven simulator using FP2....Pages 311-328
A layered emulator for design evaluation of MIMD multiprocessors with shared memory....Pages 329-344
The Alliant FX/Series: A language driven architecture for parallel processing of dusty deck fortran....Pages 345-356
Emulating digital logic using transputer networks (very high parallelism = simplicity = performance)....Pages 357-373
A two-level approach to logic plus functional programming integration....Pages 374-393
Overview of a parallel reduction machine project....Pages 394-413
An overview of DDC: Delta driven computer....Pages 414-433
Design and implementation of a parallel inference machine for first order logic: an overview....Pages 434-445
Multi-level simulator for VLSI....Pages 446-460
The DOOM system and its applications: A survey of esprit 415 subproject A, philips research laboratories....Pages 461-479