Nanoscale Electronic Devices and Their Applications

Cover
Half Title
Title Page
Copyright Page
Table of Contents
Preface
Acknowledgments
Authors
Chapter 1 Fundamentals of Nanoscale Electronic Devices
	1.1 Introduction
	1.2 Free Electron Theory and Quantum Theory
		1.2.1 Free Electron Theory
		1.2.2 Quantum Theory
	1.3 Origin of Bandgap in Solids
		1.3.1 Nearly Free Electron Model
		1.3.2 Approximate Measure of Band Gap
		1.3.3 Effective Mass Approximation
	1.4 Tight Binding Approximation
	1.5 Low-Dimensional Materials
	1.6 Quantum Confinement in Low-Dimensional Materials
		1.6.1 Particle Confinement in a Quantum Well
		1.6.2 Particle Confinement in a Quantum Wire
		1.6.3 Particle Confinement in a Quantum Dot
	1.7 Density of States in Bulk Materials
	1.8 Density of States in 2D, 1D, and 0D Materials
		1.8.1 Density of States in 2D Materials
		1.8.2 Density of States in 1D Systems
		1.8.3 Density of States in 0D Systems
	1.9 Examples of 0D, 1D, and 2D Materials
		1.9.1 Semiconductor Nanostructures
		1.9.2 Metallic Nanostructures
		1.9.3 Carbon Nanostructures
	1.10 Non-Equilibrium Green’s Function (NEGF)
	1.11 Density Functional Theory
		1.11.1 Advantages of DFT
	1.12 Summary
	References
Chapter 2 Carbon Nanotubes and Their Device Applications
	2.1 Introduction
	2.2 Physical Properties of Carbon Nanotubes
	2.3 Ballistic Transport and Quantum Conductance in CNTs
	2.4 CNT Two-Probe Devices
	2.5 CNT Field-Effect Transistors (CNTFETs)
	2.6 CNT Logic Gates
	2.7 CNT Sensors
	2.8 CNT Photodetectors and Photoresistors
	2.9 CNT Interconnects
	2.10 CNT Memories
	2.11 Summary
	References
Chapter 3 Electronic Transport Properties of Doped Carbon Nanotube Devices
	3.1 Introduction
	3.2 Doping Methods and Techniques
	3.3 Transport Properties of Two-Probe CNT Devices
	3.4 Effects of Doping on Electronic Transport Properties of Two-Probe CNT Systems
	3.5 Negative Differential Resistance (NDR) in CNTFETs and CNTMOSFETs
	3.6 NDR in Chromium-Doped Single-Walled Carbon Nanotube Devices
	3.7 Comparative Study of Conventional and Electrical Doping in CNT Devices
	3.8 Transport Properties of CNT Bio-Molecule Sensors
	3.9 Summary
	References
Chapter 4 Field-Effect Transistors Based on Graphene and Other Popular Two-Dimensional Materials
	4.1 Introduction
	4.2 Graphene Field-Effect Transistors (GFETs)
	4.3 Molybdenum Disulfide Field-Effect Transistors (MoS[sub(2)]-FETs)
	4.4 Molybdenum Diselenide Field-Effect Transistors (MoSe[sub(2)]-FETs)
	4.5 Tungsten Disulfide Field-Effect Transistors (WS[sub(2)]-FETs)
	4.6 Silicene and Germanene Field-Effect Transistors
		4.6.1 Dual-Gated Silicene FET
		4.6.2 Alkali-Adsorbed Silicene-Based FET
		4.6.3 Silicene Nanomesh FET
		4.6.4 Silicene Nanoribbon FET
		4.6.5 Li-Cl Co-Decorated Sub-10-nm Silicene Nanoribbon FET
		4.6.6 Silicene Tunnel FET
	4.7 Summary
	References
Chapter 5 Gate and Channel Engineered Nanoscale Electronic Devices
	5.1 Introduction to Nanoscale Devices
		5.1.1 Electrostatic Effects
		5.1.2 Threshold Voltage Roll-Off
		5.1.3 Leakage Currents
			5.1.3.1 Gate Leakage Current
			5.1.3.2 Subthreshold Leakage Current
			5.1.3.3 Junction Leakage Current
	5.2 Non-Conventional Solutions to Miniaturization Problems
		5.2.1 Silicon-On-Insulator
		5.2.2 Multigate MOSFET
			5.2.2.1 Double-Gate (DG) MOSFET
			5.2.2.2 Trigate (TG) MOSFET
			5.2.2.3 Gate-All-Around (GAA) MOSFET
	5.3 Gate and Channel Engineering Techniques
		5.3.1 Gate-Oxide Stack
		5.3.2 Gate Metal Work Function Engineering
		5.3.3 Channel Engineering
		5.3.4 Strained Layer
	5.4 Multigate Multi-Material MOSFET
	5.5 Multigate Multi-Material Tunnel FET
	5.6 Summary
	References
Chapter 6 Spin Nanoscale Electronic Devices and Their Applications
	6.1 Introduction to Spintronics
		6.1.1 Giant Magnetoresistance (GMR) and Its Applications
		6.1.2 Tunnel Magnetoresistance (TMR) and Its Applications
		6.1.3 Spin Injection Efficiency
	6.2 Spin Devices
		6.2.1 Magnetic Tunnel Junction (MTJ)
			6.2.1.1 Switching Mechanism in MTJ
			6.2.1.2 MTJ Models, Design, and Simulation
			6.2.1.3 Logic-In Memory Architecture
		6.2.2 Spin Field-Effect Transistor
			6.2.2.1 Multi-Gate Spin Field-Effect Transistor
			6.2.2.2 Spin-FET-Based Logic Design
			6.2.2.3 Spin-FET-Based Reconfigurable Logic Design
	6.3 Summary
	References
Chapter 7 Phase-Change Devices and Their Applications
	7.1 Introduction
	7.2 Phase-Change Memory (PCM)
		7.2.1 Overview of Phase-Change Material Properties and Chalcogenide Materials for PCM
		7.2.2 Scaling of Phase-Change Memory Devices
		7.2.3 PCM Device Architecture
		7.2.4 PCM-Based Logic Gate Design
			7.2.4.1 OR Gate Design Using PCM Logic
			7.2.4.2 NOR Gate Design Using PCM Logic
	7.3 Memristor
		7.3.1 Memristive Devices: Switching Effects, Modeling, and Applications
		7.3.2 Silicon Nanowire-Based Memristive Devices
		7.3.3 Memristor-Based Logic Design
	7.4 Resistive Random-Access Memory (RRAM)
		7.4.1 Physical Structure of RRAM
		7.4.2 Resistance Switching Materials
		7.4.3 Resistance Switching Modes
		7.4.4 Resistive Switching Mechanism
		7.4.5 Performance Metrics of Resistive Random-Access Memory (RRAM)
			7.4.5.1 Write Operation
			7.4.5.2 Read Operation
			7.4.5.3 Resistance Ratio
			7.4.5.4 Endurance
			7.4.5.5 Retention
			7.4.5.6 Uniformity
			7.4.5.7 Effect of Operating Temperature and Random Telegraph Noise
		7.4.6 RRAM-Based Non-Volatile Memory (NVM) Design
	7.5 Summary
	References
Index