Micro and Nanoelectronics Devices, Circuits and Systems: Select Proceedings of MNDCS 2021

Preface
Acknowledgements
Contents
About the Editors
Exploiting RF MEMS Switches for Pattern Reconfigurable Parasitic Antennas
	1 Introduction
	2 Proposed Antenna Design
	3 RF MEMS Switch Performance
	4 Pattern Reconfiguration with RF MEMS Switches
	5 Numerical Assessment and Discussion of Results
	6 Conclusions
	References
Comparative Analysis of Two-Stage Miller Compensated OPAMP in Bulk CMOS and FinFET Technology
	1 Introduction
	2 FinFET Device Structure
	3 Design Methodology of Op-Amp
	4 Simulation Results
	5 Conclusion
	References
Performance-Based Comparative Study on Single- and Dual-Gate OTFT: Modeling and Simulation Using TCAD
	1 Introduction
	2 Single-/Dual-Gate Simulation Setup and Extraction of Parameter
	3 Simulation Results and Discussion
		3.1 Comparison and Functioning of the Single- and Dual-Gate OTFT
		3.2 Channel-Length Variation in Single- and Dual-Gate OTFT
		3.3 Active Layer Thickness Variation in Single- and Dual-Gate OTFT
		3.4 Dielectric Thickness Variation in Single- and Dual-Gate OTFT
	4 Conclusion
	References
Structural and Morphological Properties of Indium-doped Titanium Dioxide Nanoparticles Synthesized Using Sol–gel Process
	1 Introduction
	2 Experimental Procedures
	3 Results and Analysis
		3.1 X-ray Diffraction (XRD) Investigation
		3.2 TEM and EDS Analysis
		3.3 SEM Assessment
		3.4 Fourier Transform Infrared Spectroscopy (FTIR) Analysis
		3.5 XPS Analysis
	4 Conclusions
	References
Review of Emerging Tunnel FET Structures
	1 Introduction
	2 Novel TFET Structure to Boost On Current (ION) and for Ultralow-Power Applications
		2.1 Surface Tunnel Transistor
		2.2 Basic p-i-n TFET
		2.3 Feedback FET
		2.4 Double-Gate (DG) TEFT
		2.5 Circular TFET
		2.6 Heterojunction TEFT
		2.7 Cylindrical-Gate Tunnel FET (CG-TFET)
		2.8 p-n-i-n TFET
		2.9 p-n-p-n Tunnel FET
	3 TFET for Low-Power Application
		3.1 Ultralow-Power and Sensitive UHF RFID Rectifier
		3.2 nTFET-Based Dynamic Circuit
		3.3 TFET-Based Pass Transistor Logic (PTL)
	4 Challenges of TFET
		4.1 Asymmetrical Structure and Unidirectional Conduction
		4.2 Point TFET and Line TFET
		4.3 Raised Miller Capacitance
		4.4 Delayed Saturation
	5 Conclusions
	References
Performance Analysis of Defective 1D Photonic Crystal Structure for Detection of Hemoglobin Concentrations in Blood
	1 Introduction
	2 Theoretical Treatment
	3 Results and Interpretations
	4 Conclusion
	References
Comparative Analysis of Different FET-Based Biosensor: Recent Advances in Device Structure and Sensitivity
	1 Introduction
	2 Literature Survey
	3 Biosensor Arrays Using Nano-Wires
		3.1 Planar Biosensor
		3.2 Cylindrical Nano-Wire Biosensor
		3.3 Double Gate FET-Based Biosensor
		3.4 Extended Gate FET-Based Biosensor
	4 Conclusion
	References
Study of Noise Behavior of Heterojunction Double-Gate PNPN TFET for Different Parameter Variations
	1 Introduction
	2 Dimension and Simulation Setup of the Proposed Device
	3 Results and Discussion
	4 Conclusion
	References
Analysis of Optical Effects of Different Anodes on Organic Light-Emitting Diode
	1 Introduction
	2 Design of Organic Light-Emitting Diode
	3 Numerical Simulation and Results
	4 Conclusion
	References
Analysis and Design of Surface Plasmon Resonance Waveguide for Sensing Application
	1 Introduction
	2 Surface Plasmons
	3 Design and Analysis
		3.1 Design of SPR Waveguide Sensor
	4 Result Analysis
	5 Conclusion
	References
Iterative Approach for Low Actuation Voltage RF MEMS Switch
	1 Introduction
	2 Related Work and Problem Statement
	3 Mathematical Analysis
	4 Iterative Approach
	5 Conclusion
	References
Investigating the Effect of Various Bragg’s Reflector Configurations on the Performance of Flexible FBAR Sensors
	1 Introduction
	2 Flexible FBAR Structure and Its Operation
	3 BVD and MBVD Equivalent Models of Flexible FBAR
	4 Results and Discussions
	5 Conclusions
	References
Predictive Analysis of Step-Quantum Well Active Region for Quantum Cascade Detectors
	1 Introduction
	2 Theoretical Considerations
	3 Results and Discussion
	4 Conclusion
	References
Design of High Speed and Power Efficient 16 × 8 SRAM Memory Using Improved 4 × 16 Decoder
	1 Introduction
	2 Memory
		2.1 SRAM Cell
	3 Simulation and Results
	4 Conclusion
	References
A Divide-By-5 Pre-scaler Design Approach for 5G Applications
	1 Introduction
	2 Divide-By-5 Pre-scaler Architecture
		2.1 Conventional Architecture
		2.2 Proposed Architecture
	3 Design of Delay Cells
		3.1 Calculation of   Wn /Ln of NMOS Transistor from the Current Equation
		3.2 Calculation of Wp Lp  from K Value
		3.3 Calculation of Wn Ln  from Propagation Delay Constraint
		3.4 Calculation of Wp Lp  from Propagation Delay Constraint
	4 Conclusions
	References
Analyzing the Effect of Various Reducing Agents and Their Concentrations on Gas Sensing Performance of Graphene Aerogel-Based Ammonia Sensor
	1 Introduction
	2 Material Synthesis, Characterization, and Gas Sensing Results
	3 Conclusions
	References
Performance Evaluation of Double-Gate Tunnel Field-Effect Transistor with Germanium Epitaxial Layer
	1 Introduction
	2 Device Model and Simulation Setup
	3 ETL-DGTFET Design Concept
	4 Impact of Structural Variation
	5 DC Performance Comparison
	6 Analog/RF Performance
	7 Conclusion
	References
Rapid Detection of Biomolecules Using Dielectric Modulated Ferroelectric GaN HEMT
	1 Introduction
	2 Working Principle
	3 Device Architecture
	4 Results and Discussions
	5 Conclusion
	References
A Low Leakage with Enhanced Write Margin 10T SRAM Cell for IoT Applications
	1 Introduction
	2 10 T SRAM Bit-Cell Working Mechanism
		2.1 Read Mode
		2.2 Write Mode
		2.3 Hold Mode
	3 Result and Discussion
		3.1 Read/write Stability
		3.2 Power Dissipation
		3.3 Read/write Delay
	4 Conclusion
	References
Energy-Efficient Hardware Implementation of K-means Clustering Algorithm
	1 Introduction
	2 K-Means Clustering Algorithm
	3 Random Initialization
		3.1 Working Principle
	4 Training
		4.1 Working Principle
	5 Testing
		5.1 Working Principle
	6 Results and Analysis
		6.1 Random Initialization
		6.2 Training
		6.3 Testing
	7 Hardware Implementation
		7.1 Random Initialization
		7.2 Training/Testing
	8 Results and Discussion
	9 Conclusion
	References
Performance Analysis of HIT-CZTS Tandem Solar Cell Towards Minimizing Current Losses
	1 Introduction
	2 Simulation Methodology
	3 Results and Discussions
		3.1 EQE Analysis of HIT-CZTS Tandem Solar Cell
		3.2 Photo Generation and Recombination Profile
		3.3 Current Densities in the Tandem Solar Cell
		3.4 Nitride Based Interfacial Layers
	4 Conclusion
	References
Triple Linear Congruential Generator-Based Hardware-Efficient Pseudorandom Bit Generation
	1 Introduction
	2 Proposed Tri-LCG Method
	3 Proposed Architecture of Tri-LCG Method
	4 Results and Discussion
		4.1 NIST Test Analysis of the Proposed Tri-LCG
		4.2 VLSI Implementation
	5 Conclusion
	References
Flicker Noise Analysis of Non-uniform Body TFET with Dual Material Source (NUTFET-DMS)
	1 Introduction
	2 Structure and Simulation Description
	3 Results and Analysis
	4 Conclusion
	References
Study of Temperature Effect on MOS-HEMT Small-Signal Parameters
	1 Introduction
	2 2-D Structure View and Its Equivalent Circuit
	3 Temperature Dependent Parameter Modeling
	4 Results and Discussion
	5 Conclusion
	References
Numerical Simulation-Based Comparative Study of FinFET and MOSFET with Gallium Oxide
	1 Introduction
	2 Simulation Methods
	3 Results and Discussion
		3.1 Planar Vertical MOSFET
		3.2 FinFET Structure in Vertical Mode
	4 Conclusion
	References
Optimization of 2D Ge-Pocket Asymmetric Dual-Gate Tunnel FETs
	1 Introduction
	2 Device Structure and Simulation Setup
	3 Results and Discussion
	4 Conclusion
	References
Investigation of Electrical Parameters and Low-Frequency Noise Analysis of a Heterojunction TFET
	1 Introduction
	2 Working Principle
	3 Simulation Format
	4 Results and Discussion
		4.1 Effect of Drain Bias
		4.2 Effect of Source Doping
		4.3 Effect of Silicon Body Thickness
		4.4 Influence of  Current Noise-Spectral Density on Si Body Thickness
	5 Conclusion
	References
Design and Fabrication of a Cost-Effective, Electrochemical Detection-Based, Polymeric Capillary-Electrophoresis Microfluidic Devices for Diverse Bioanalytical Functions
	1 Introduction
	2 Device Design and Fabrication
		2.1 Microchannel Fabrication and Electrode Integration
	3 Experimental Setup
		3.1 End Column Detection of the Analyte Detection Instrumentation
	4 Results and Discussion
		4.1 Detection of Analyte
		4.2 End-Channel Amperometric Detection for Microchip Electrophoresis
		4.3 Separation Efficiency and Limit of Detection
	5 Conclusion
	References
Morphological and Optical Analysis of GLAD Synthesize Vertically Oriented TiO2 Nanowires on GaN Substrate for Optoelectronics Application
	1 Introduction
	2 Experimental Procedure
	3 Results and Discussion
		3.1 FE-SEM Analysis
		3.2 Absorption Analysis
		3.3 Photoluminescence Analysis
	4 Conclusion
	References
Analysis of a Proof mass Structure of a Capacitive Accelerometer as Wearable Sensor for Health Monitoring
	1 Introduction
	2 Literature Survey
	3 Device Structure and Principal of Operation
		3.1 Microstructure
		3.2 Modelling of the Proof Mass for Optimum Design
	4 Results and Discussion
	5 Conclusion
	References:
SCAPS-1D Simulations for Comparative Study of Alternative Absorber Materials Cu2XSnS4 (X = Fe, Mg, Mn, Ni, Sr) in CZTS-Based Solar Cells
	1 Introduction
	2 Material Parameters Used in Simulation with Device Architecture
	3 Results and Discussion
		3.1 Effect of Absorber Layer Thickness Variation
		3.2 Effect of Electron Affinity Variation of Absorber Layer
		3.3 Effect of Absorber Layer Acceptor Doping Density
		3.4 Effect of Variation of Defect Density of Absorber Layer and at the Interface of Absorber and Buffer Layer
	4 Conclusion
	References
High-Performance Current Mirror-Based Voltage-Controlled Oscillator for Implantable Devices
	1 Introduction
	2 Current Mirror Topologies
	3 VCO Designs Using Current Mirror Topologies
	4 Result and Discussion
	5 Conclusion
	References
Power Efficient Analysis of MOS Current Mode Logic Based Delay Flip Flop
	1 Introduction
	2 Implementation of CMOS Based NAND
	3 Implementation of MCML Based NAND
	4 Proposed Circuit: MCML Based D Flipflop
	5 Conclusion
	References
Design and Analysis RF-MEMS Capacitive SPDT Switch for Wireless Applications
	1 Introduction
	2 Structure of the Proposed Device
	3 Results and Its Discussions
		3.1 Spring Constant and Pull-In Voltage
		3.2 RF-Performance Analysis
	4 Conclusion
	References
Design of Piezoresistive-Based Microcantilever for MEMS Pressure Sensor in Continuous Glucose Monitoring System
	1 Introduction
	2 Methodology
		2.1 Proposed Device
		2.2 Working Principle
	3 Results and Discussion
		3.1 Microcantilever by Capacitive Principle
		3.2 Microcantilever by Piezoelectric Principle
	4 Conclusion
	References
Impact of Quantum Wells on the Open-Circuit Voltage of the Kesterite Solar Cells
	1 Introduction
	2 Device Structure
	3 Preliminary Results/Discussion
	4 Conclusion
	References
A 0.7 V 0.144 µW Frequency Divider Design with CNTFET-Based Master Slave D-Flip Flop
	1 Introduction
	2 CMOS Implementation of MSD-FF
	3 Simulation Results
	4 Proposed Design: Frequency Divider Using CNTFET MSD-FF
	5 Results and Discussion
	6 Conclusion
	References
Radix-10 Multiplier Implementation with Carry Skip Adder Using Verilog
	1 Introduction
	2 Proposed Work
	3 Implementation and Results
		3.1 Multiple Calculation
		3.2 Accumulated Multiple and Multiplier Encoding
		3.3 For Multiplier Digits Greater Than or Equal to 5
		3.4 For Multiplier Digits Less Than Five
		3.5 Partial Product Addition Using Carry Skip Adder
	4 Simulation Results
	5 Conclusion
	References
Design and Analysis of FEM Novel X-Shaped Broadband Linear Piezoelectric Energy Harvester
	1 Introduction
	2 Design and Working Principle
	3 Simulation Model Using Finite Element Methods (FEMs)
	4 Results and Discussion
	5 Conclusions
	References
Efficient Full Adder Design Based on New Reversible Tuned Fredkin Gate (TFG)
	1 Introduction
	2 Basic Definitions Associated with Reversible Logic Gate
		2.1 Constant Input/Ancilla Input
		2.2 Garbage Output (GO)
		2.3 Quantum Cost (QC)
		2.4 Delay
	3 Fundamental Reversible Gates
		3.1 CNOT / Feynman Gate (F)
		3.2 Fredkin Gate (FG)
	4 Proposed 3 × 3 TFG Gate
		4.1 Realization of Basic Logic Gates
	5 Reversible Adder Designs
		5.1 Existing Adder Design 1
		5.2 Existing Adder Design 2
		5.3 Proposed Work
	6 Simulation Results and Analysis
	7 Conclusion
	References
Design of High-Speed 32-Bit Vedic Multiplier Using Verilog HDL
	1 Introduction
	2 Urdhya Thiryagbhyam
	3 Carry Save Adder
	4 Vedic Multiplier
	5 Proposed Vedic Multiplier
	6 Results
	7 Conclusion
	References
Designing of RF-MEMS Capacitive Contact Shunt Switch and Its Simulation for S-band Application
	1 Introduction
	2 Proposed Design
		2.1 Electromechanical Analysis
		2.2 Electromagnetic Analysis
	3 Results and Discussion
	4 Conclusions
	References
Study and Analysis of Retention Time and Refresh Frequency in 1T1C DRAM at Nanometer Regime
	1 Introduction
	2 Related Work
	3 Implementation and Experiments
		3.1 DRAM Cell Memory
		3.2 Schematic and Simulation of DRAM Cell
		3.3 Simulation Result
	4 Results and Discussion
	5 Conclusion
	References
Self-Automated Parking with FPGA-Based Robot
	1 Introduction
	2 Mobile Robot Parking Algorithm for Indoor Environment
		2.1 Self-Exploration of Mobile Robot for Parking
		2.2 Parallel Parking Algorithm of Robot
	3 Hardware Scheme of Parallel Parking
	4 Results
		4.1 Comparison
	5 Conclusion
	References
Validation and Implementation of a Smart Flood Surveillance System Based on Wireless Sensor Network
	1 Introduction
	2 Working Principle
	3 Mathematical Analyses
	4 Results and Discussion
	5 Conclusion
	References
Hybrid Nonlinear Vibration Energy Harvester Due to Combined Effect of Stretching and Magnetic-Induced Nonlinearity
	1 Introduction
	2 Structural Design and Simulation of the Nonlinear Hybrid Vibration Energy Harvester
		2.1 Structural Design
		2.2 Finite Element Analysis
	3 Result and Discussion
	4 Conclusion
	References
Design and Performance Evaluation of 1 KB SRAM in SCL 180 nm Technology
	1 Introduction
	2 SRAM Operation
		2.1 Hold Mode
		2.2 Read Operation
		2.3 Write Operation
		2.4 SRAM Read Write Control
	3 Design of Blocks and Their Integration
		3.1 Memory Cell Array
		3.2 Word Line Driver
		3.3 Row and Column Decoders
		3.4 Write Driver Circuit
		3.5 Sense Amplifier
		3.6 Precharge Circuit
	4 Results and Discussion
		4.1 Static Noise Margin (SNM)
		4.2 Read Noise Margin (RNM)
		4.3 Write Noise Margin (WNM)
		4.4 SRAM Read and Write Operations
	5 Conclusion
	References
Comprehensive Analysis of α- and β-form of Copper (II) Phthalocyanine for Organic Field-Effect Transistors
	1 Introduction
	2 Experimentation
	3 Results and Discussion
		3.1 Transistor Performance
		3.2 Material Properties
	4 Conclusion
	References