Group B Coxsackieviruses

Pratical Reliability of Electronic Equipment and Products......Page 1
PREFACE......Page 8
ACKNOWLEDGMENTS......Page 10
CONTENTS......Page 11
1.1 WHAT IS RELIABILITY?......Page 15
CONTENTS......Page 0
1.3 THE BATHTUB FAILURE RATE CURVE......Page 20
1.3.2 REGION II — USEFUL LIFE OR RANDOM FAILURES......Page 21
1.3.3 REGION III — AGING AND WEAROUT FAILURES......Page 22
1.4 RELIABILITY GOALS AND METRICS......Page 26
1.5 RELIABILITY PREDICTION......Page 28
1.5.1 EXAMPLE OF BELLCORE RELIABILITY PREDICTION......Page 30
1.6 RELIABILITY RISK......Page 31
1.7 RELIABILITY GROWTH......Page 37
1.8 RELIABILITY DEGRADATION......Page 38
1.8.1 COMPONENT DEGRADATION......Page 39
1.10 RELIABILITY TRENDS......Page 40
REFERENCES......Page 41
2.1 STATISTICAL TERMS......Page 42
2.1.1 PART REPLACEMENT RATE FOR COMPUTER APPLICATIONS......Page 43
2.1.3 MEAN TIME TO FAILURE......Page 45
2.2 STATISTICAL DISTRIBUTIONS......Page 47
2.2.1 CONTINUOUS DISTRIBUTIONS......Page 48
2.2.2 WEIBULL DISTRIBUTION......Page 55
2.2.3 DISCRETE DISTRIBUTIONS......Page 57
2.4 CONFIDENCE LIMIT AND INTERVALS......Page 58
2.6 RELIABILITY MODELING......Page 65
2.7 PRACTICAL MTBF AND WARRANTY COST CALCULATIONS......Page 67
REFERENCE......Page 71
APPENDIX A......Page 72
APPENDIX A (CONTINUED)......Page 73
3.1 INTRODUCTION......Page 74
3.2 CONCURRENT ENGINEERING/DESIGN TEAMS......Page 76
3.3.1 PHASE 0: CONCEPT......Page 78
3.3.3 PHASE 2: SPECIFICATION AND DESIGN......Page 79
3.3.6 PHASE 5: PRODUCTION AND SUPPORT......Page 80
3.5 TECHNOLOGY ASSESSMENT......Page 82
3.6.1 CIRCUIT TYPES AND CHARACTERISTICS......Page 87
3.6.2 DESIGN DISCIPLINES AND INTERACTIONS......Page 88
3.6.3 UNDERSTANDING THE COMPONENTS......Page 91
3.7 POWER SUPPLY CONSIDERATIONS......Page 93
3.8 REDUNDANCY......Page 95
3.10 RELIABILITY PREDICTION......Page 97
3.11 SUPPORT COST AND RELIABILITY TRADEOFF MODEL......Page 98
3.11.1 DERATING EXAMPLES......Page 101
3.12 STRESS ANALYSIS AND PART DERATING......Page 100
3.13 PCB DESIGN, PWA LAYOUT, AND DESIGN FOR MANUFACTURE......Page 108
3.13.1 SOME PRACTICAL CONSIDERATIONS......Page 121
3.14 THERMAL MANAGEMENT......Page 127
3.15 SIGNAL INTEGRITY AND DESIGN FOR ELECTROMAGNETIC COMPATIBILITY......Page 129
3.16 DESIGN FOR TEST......Page 134
3.16.1 DESIGN FOR TEST AT THE IC LEVEL......Page 138
3.16.2 DESIGN FOR TEST PWA LEVEL......Page 149
3.16.3 DESIGN FOR TEST AT THE SYSTEM LEVEL......Page 150
3.18 BILL OF MATERIAL REVIEWS......Page 151
3.19 DESIGN REVIEWS......Page 152
3.20 THE SUPPLY CHAIN AND THE DESIGN ENGINEER......Page 154
3.20.1 DESIGN OPTIMIZATION AND SUPPLY CHAIN CONSTRAINTS......Page 155
3.20.2 SUPPLY CHAIN PARTNER DESIGN COLLABORATION......Page 156
3.21 FAILURE MODES AND EFFECTS ANALYSIS......Page 157
3.22 DESIGN FOR ENVIRONMENT......Page 165
3.24 DEVELOPMENT AND DESIGN TESTING......Page 167
3.24.2 DESIGN VERIFICATION TESTING......Page 168
3.24.3 THERMOGRAPHY......Page 169
3.24.4 ACCELERATED STRESS TESTING......Page 170
3.25 TRANSPORTATION AND SHIPPING TESTING......Page 174
3.26.2 PRODUCT SAFETY TESTING......Page 175
3.26.3 ELECTROMAGNETIC COMPATIBILITY TESTING......Page 176
3.27 DESIGN ERRORS......Page 177
REFERENCES......Page 178
FURTHER READING......Page 179
4.2 THE PHYSICAL SUPPLY CHAIN......Page 180
4.3.1 OVERVIEW......Page 183
4.3.2 HISTORICAL PERSPECTIVE......Page 186
4.3.3 CORE COMPETENCIES......Page 188
4.3.4 TYPES OF SOURCING......Page 189
4.3.5 CATEGORIES OF SUPPLIERS......Page 202
4.3.6 CUSTOMER-SUPPLIED RELATIONSHIPS......Page 206
4.3.7 COMMODITY TEAMS......Page 207
4.4 THE ROLE OF THE COMPONENT ENGINEER......Page 210
4.4.1 BEYOND THE YEAR 2000......Page 212
4.5 COMPONENT SELECTION......Page 215
4.6.1 HISTORICAL PERSPECTIVE: INTEGRATED CIRCUIT TEST......Page 217
4.6.2 FAILURE MECHANISMS AND ACCELERATION FACTORS......Page 221
4.7 COMPONENT QUALIFICATION......Page 230
4.7.1 QUALIFICATION TESTING IN THE PAST......Page 231
4.7.2 CURRENT QUALIFICATION METHODOLOGY......Page 234
4.7.3 FORWARD-THINKING QUALIFICATION......Page 238
4.7.4 APPLICATION-BASED QUALIFICATION: THE FUTURE......Page 242
4.7.5 DEVELOPING A COMPONENT QUALIFICATION STRATEGY......Page 248
REFERENCES......Page 250
4.A.1 INTRODUCTION TO SCORECARD PROCESS......Page 251
4.A.2 SCORECARD METRICS......Page 253
APPENDIX B: SELF-QUALIFICATION FORM FOR PROGRAMMABLE LOGIC ICS......Page 255
5.1 INTRODUCTION......Page 259
5.2 THERMAL ANALYSIS MODELS AND TOOLS......Page 260
5.3 IMPACT OF HIGH-PERFORMANCE INTEGRATED CIRCUITS......Page 266
5.4 MATERIAL CONSIDERATIONS......Page 271
5.5 EFFECT OF HEAT ON COMPONENTS, PRINTED CIRCUIT BOARDS, AND SOLDER......Page 273
5.6 COOLING SOLUTIONS......Page 278
5.6.2 HEAT SPREADERS......Page 281
5.6.3 PASSIVE HEAT SINKS......Page 282
5.6.4 ENCLOSURE FANS......Page 285
5.6.5 HEAT PIPES......Page 286
5.6.6 OTHER COOLING METHODS......Page 287
5.7.1 THERMAL VERSUS ELECTROMAGNETIC COMPATIBILITY DESIGN TRADEOFFS......Page 293
FURTHER READING......Page 294
6.1.1 WHAT IS ELECTROSTATIC DISCHARGE AND HOW DOES IT OCCUR?......Page 295
6.1.2 ELECTROSTATIC DISCHARGE – INDUCED FAILURE MECHANISMS......Page 296
6.1.3 PREVENTING ELECTROSTATIC DISCHARGE DAMAGE......Page 297
6.1.4 THE ELECTROSTATIC DISCHARGE THREAT AT THE PRINTED WIRE ASSEMBLY LEVEL......Page 301
6.2.1 INTRODUCTION TO ELECTROMAGNETIC COMPATIBILITY......Page 304
6.2.2 ELECTROMAGNETIC COMPATIBILITY DESIGN GUIDELINES......Page 310
FURTHER READING......Page 318
7.1.1 INTRODUCTION......Page 320
7.1.2 OUTSOURCE MANUFACTURING......Page 321
7.2.1 INTRODUCTION......Page 334
7.2.2 VISUAL INSPECTION......Page 336
7.2.3 ELECTRICAL TESTING......Page 337
7.3 ENVIRONMENTAL STRESS SCREENING......Page 347
7.3.1 LESSONS LEARNED THROUGH TESTING......Page 365
7.4 SYSTEM TESTING......Page 371
7.5 FIELD DATA COLLECTION AND ANALYSIS......Page 373
7.6 FAILURE ANALYSIS......Page 379
ACKNOWLEDGMENTS......Page 385
FURTHER READING......Page 386
8.1 INTRODUCTION......Page 388
8.2 HARDWARE/ SOFTWARE DEVELOPMENT COMPARISON......Page 389
8.3 SOFTWARE AVAILABILITY......Page 390
8.4.1 SOFTWARE QUALITY ESTIMATE......Page 391
8.4.2 SOFTWARE DEFECTS AND STATISTICAL PROCESS CONTROL......Page 392
8.4.3 SOFTWARE QUALITY MEASURES......Page 395
8.4.4 DEFECT PREVENTION......Page 396
8.4.5 THE SEI CAPABILITY MATURITY MODEL......Page 400
REFERENCE......Page 419
RESISTOR DERATING......Page 420
CAPACITOR DERATING......Page 422
CAPACITOR APPLICATION NOTES......Page 423
DISCRETE SEMICONDUCTOR DERATING......Page 424
DISCRETE SEMICONDUCTOR APPLICATION NOTES......Page 425
INTEGRATED CIRCUIT APPLICATION NOTES......Page 427
MAGNETIC DEVICES APPLICATION NOTES......Page 429
CONNECTOR APPLICATION NOTES......Page 430
SWITCH APPLICATION NOTES......Page 431
FUSE DERATING......Page 432
FUSE APPLICATION NOTES......Page 433
APPENDIX B: FMEA EXAMPLE FOR A MEMORY MODULE......Page 434