Fundamentals of Tunnel Field-Effect Transistors

Content: Cover
 Half Title
 Title Page
 Copyright Page
 Dedication
 Table of Contents
 Preface
 1: CMOS Scaling
 1.1 Introduction
 1.2 Basics of MOSFET and CMOS
 1.2.1 MOSFET Structure and Operation
 1.2.2 Operation of MOSFET as a Switch
 1.2.3 Short-Channel Effects in a MOSFET
 1.2.4 CMOS Inverter
 1.2.5 Power Dissipation in a CMOS Circuit
 1.3 CMOS Scaling
 1.4 Types of CMOS Scaling
 1.4.1 Constant-Field Scaling
 1.4.2 Constant-Voltage Scaling
 1.5 Historical Perspective of CMOS Scaling
 1.6 Current Trends in CMOS Scaling
 1.7 Challenges in Continued CMOS Scaling
 1.8 Emerging Research Devices. 1.9 Summary2: Quantum Tunneling
 2.1 Introduction
 2.2 Quantum Mechanics
 2.3 Quantum Mechanical Tunneling
 2.4 Solving the Tunneling Problem
 2.4.1 Analytic Approximation Methods
 2.4.2 Numerical Methods
 2.5 Junction Breakdown Due to Tunneling
 2.6 Tunnel Diode
 2.7 Summary
 3: Basics of Tunnel Field-Effect Transistors
 3.1 Introduction
 3.2 Device Structure
 3.3 Operation
 3.4 Transfer Characteristics
 3.4.1 OFF-State
 3.4.2 Subthreshold Region
 3.4.3 Super-Threshold Region
 3.5 Subthreshold Swing
 3.6 Tunneling Current
 3.7 Output Characteristics
 3.7.1 Tunnel Resistance-Dominated Region. 3.7.2 Channel Resistance-Dominated Region3.7.3 Saturation Region
 3.8 Threshold Voltage
 3.9 Different Types of TFETs
 3.10 Impact of Device Parameters
 3.10.1 Gate Dielectric
 3.10.2 Body Thickness
 3.10.3 Source Doping Concentration and Profile
 3.10.4 Channel Length
 3.11 Ambipolar Current
 3.12 Impact of Temperature
 3.13 Promises and Limitations
 3.14 Summary
 4: Boosting ON-Current in Tunnel Field-Effect Transistor
 4.1 Introduction
 4.2 Types of Techniques to Boost ON-Current
 4.3 Gate Engineering
 4.3.1 Thickness and Dielectric Constant of Gate Oxide
 4.3.2 Multiple Gates. 4.3.3 Spacer Engineering4.3.4 Asymmetric Gate Structures
 4.3.5 Quality of Gate Oxide
 4.4 Tunneling Junction Engineering
 4.4.1 Source Doping
 4.4.2 Tunneling Area
 4.4.3 Heterojunctions
 4.5 Materials Engineering
 4.5.1 Germanium
 4.5.2 III-V Semiconductors
 4.5.3 Carbon
 4.5.4 Nanowires
 4.6 Strain Engineering
 4.7 Summary
 5: III-V Tunnel Field-Effect Transistor
 5.1 Introduction
 5.2 III-V Semiconductors
 5.3 Challenges in III-V Materials-Based MOSFETs
 5.4 A III-V TFET Prototype
 5.5 Heterojunction III-V TFETs
 5.6 Device Optimization in III-V TFETs
 5.7 Gate Dielectric in III-V TFETs. 5.7.1 Processing Techniques5.7.2 Interface Material Engineering
 5.7.3 Hybrid III-V/Silicon TFET
 5.8 Tunneling Junction
 5.9 Impact of Temperature
 5.10 Challenges in p-Type III-V TFETs
 5.11 Current State and Future Perspective
 5.12 Summary
 6: Carbon-Based Tunnel Field-Effect Transistor
 6.1 Introduction
 6.2 Carbon Nanotubes (CNTs)
 6.3 CNT TFETs
 6.3.1 Ballistic Transport
 6.3.2 Quantum Capacitance
 6.4 Device Optimization of CNT TFETs
 6.5 Challenges and Future Perspectives of CNT TFETs
 6.6 Graphene
 6.7 Graphene TFETs
 6.7.1 GNR-Based TFET
 6.7.2 Bilayer-Graphene TFET.