Computer Organization and Architecture

Cover......Page 1
Title Page......Page 2
Copyright Page......Page 3
ACKNOWLEDGMENTS......Page 19
Contents......Page 6
Online Resources......Page 12
Preface......Page 14
About the Author......Page 22
Chapter 0 Reader’s and Instructor’s Guide......Page 24
0.2 A Roadmap for Readers and Instructors......Page 25
0.3 Why Study Computer Organization and Architecture?......Page 26
0.4 Internet and Web Resources......Page 28
Chapter 1 Introduction......Page 29
1.1 Organization and Architecture......Page 30
1.2 Structure and Function......Page 31
1.3 Key Terms and Review Questions......Page 37
Chapter 2 Computer Evolution and Performance......Page 38
2.1 A Brief History of Computers......Page 39
2.2 Designing for Performance......Page 60
2.3 Multicore, MICs, and GPGPUs......Page 66
2.4 The Evolution of the Intel x86 Architecture......Page 67
2.5 Embedded Systems and the ARM......Page 68
2.6 Performance Assessment......Page 72
2.7 Recommended Reading......Page 82
2.8 Key Terms, Review Questions, and Problems......Page 83
Chapter 3 A Top-Level View of Computer Function and Interconnection......Page 88
3.1 Computer Components......Page 89
3.2 Computer Function......Page 91
3.3 Interconnection Structures......Page 107
3.4 Bus Interconnection......Page 108
3.5 Point-To-Point Interconnect......Page 116
3.6 PCI Express......Page 121
3.8 Key Terms, Review Questions, and Problems......Page 131
Chapter 4 Cache Memory......Page 135
4.1 Computer Memory System Overview......Page 136
4.2 Cache Memory Principles......Page 143
4.3 Elements of Cache Design......Page 146
4.4 Pentium 4 Cache Organization......Page 164
4.5 ARM Cache Organization......Page 167
4.6 Recommended Reading......Page 169
4.7 Key Terms, Review Questions, and Problems......Page 170
Appendix 4A: Performance Characteristics of Two-Level Memories......Page 175
Chapter 5 Internal Memory......Page 182
5.1 Semiconductor Main Memory......Page 183
5.2 Error Correction......Page 193
5.3 Advanced DRAM Organization......Page 197
5.4 Recommended Reading......Page 203
5.5 Key Terms, Review Questions, and Problems......Page 204
Chapter 6 External Memory......Page 208
6.1 Magnetic Disk......Page 209
6.2 RAID......Page 218
6.3 Solid State Drives......Page 228
6.4 Optical Memory......Page 233
6.5 Magnetic Tape......Page 238
6.6 Recommended Reading......Page 240
6.7 Key Terms, Review Questions, and Problems......Page 241
Chapter 7 Input/Output......Page 244
7.1 External Devices......Page 246
7.2 I/O Modules......Page 249
7.3 Programmed I/O......Page 251
7.4 Interrupt-Driven I/O......Page 255
7.5 Direct Memory Access......Page 263
7.6 I/O Channels and Processors......Page 269
7.7 The External Interface: Thunderbolt and Infiniband......Page 271
7.8 IBM zEnterprise 196 I/O Structure......Page 279
7.10 Key Terms, Review Questions, and Problems......Page 283
Chapter 8 Operating System Support......Page 288
8.1 Operating System Overview......Page 289
8.2 Scheduling......Page 300
8.3 Memory Management......Page 306
8.4 Pentium Memory Management......Page 317
8.5 ARM Memory Management......Page 322
8.7 Key Terms, Review Questions, and Problems......Page 327
Chapter 9 Number Systems......Page 332
9.1 The Decimal System......Page 333
9.2 Positional Number Systems......Page 334
9.4 Converting Between Binary and Decimal......Page 335
9.5 Hexadecimal Notation......Page 338
9.7 Key Terms and Problems......Page 340
Chapter 10 Computer Arithmetic......Page 342
10.1 The Arithmetic and Logic Unit......Page 343
10.2 Integer Representation......Page 344
10.3 Integer Arithmetic......Page 349
10.4 Floating-Point Representation......Page 364
10.5 Floating-Point Arithmetic......Page 372
10.6 Recommended Reading......Page 381
10.7 Key Terms, Review Questions, and Problems......Page 382
Chapter 11 Digital Logic......Page 387
11.1 Boolean Algebra......Page 388
11.2 Gates......Page 391
11.3 Combinational Circuits......Page 393
11.4 Sequential Circuits......Page 411
11.5 Programmable Logic Devices......Page 420
11.7 Key Terms and Problems......Page 424
Chapter 12 Instruction Sets: Characteristics and Functions......Page 428
12.1 Machine Instruction Characteristics......Page 429
12.2 Types of Operands......Page 436
12.3 Intel x86 and ARM Data Types......Page 438
12.4 Types of Operations......Page 441
12.5 Intel x86 and ARM Operation Types......Page 454
12.7 Key Terms, Review Questions, and Problems......Page 464
Appendix 12A: Little-, Big-, and Bi-Endian......Page 470
Chapter 13 Instruction Sets: Addressing Modes and Formats......Page 474
13.1 Addressing Modes......Page 475
13.2 x86 and ARM Addressing Modes......Page 482
13.3 Instruction Formats......Page 487
13.4 x86 and ARM Instruction Formats......Page 496
13.5 Assembly Language......Page 500
13.7 Key Terms, Review Questions, and Problems......Page 502
Chapter 14 Processor Structure and Function......Page 506
14.1 Processor Organization......Page 507
14.2 Register Organization......Page 509
14.3 Instruction Cycle......Page 514
14.4 Instruction Pipelining......Page 518
14.5 The x86 Processor Family......Page 535
14.6 The ARM Processor......Page 543
14.7 Recommended Reading......Page 549
14.8 Key Terms, Review Questions, and Problems......Page 550
Chapter 15 Reduced Instruction Set Computers......Page 554
15.1 Instruction Execution Characteristics......Page 556
15.2 The Use of a Large Register File......Page 561
15.3 Compiler-Based Register Optimization......Page 566
15.4 Reduced Instruction Set Architecture......Page 568
15.5 RISC Pipelining......Page 574
15.6 MIPS R4000......Page 579
15.7 SPARC......Page 585
15.8 RISC Versus CISC Controversy......Page 591
15.10 Key Terms, Review Questions, and Problems......Page 592
Chapter 16 Instruction-Level Parallelism and Superscalar Processors......Page 596
16.1 Overview......Page 597
16.2 Design Issues......Page 602
16.3 Pentium 4......Page 612
16.4 ARM Cortex-A8......Page 618
16.5 Recommended Reading......Page 626
16.6 Key Terms, Review Questions, and Problems......Page 628
Chapter 17 Parallel Processing......Page 634
17.1 Multiple Processor Organizations......Page 636
17.2 Symmetric Multiprocessors......Page 638
17.3 Cache Coherence and the MESI Protocol......Page 642
17.4 Multithreading and Chip Multiprocessors......Page 649
17.5 Clusters......Page 656
17.6 Nonuniform Memory Access......Page 663
17.7 Vector Computation......Page 667
17.8 Recommended Reading......Page 679
17.9 Key Terms, Review Questions, and Problems......Page 680
Chapter 18 Multicore Computers......Page 687
18.1 Hardware Performance Issues......Page 688
18.2 Software Performance Issues......Page 692
18.3 Multicore Organization......Page 697
18.4 Intel x86 Multicore Organization......Page 699
18.5 ARM11 MPCore......Page 702
18.6 IBM zEnterprise 196 Mainframe......Page 707
18.8 Key Terms, Review Questions, and Problems......Page 710
Appendix A: Projects for Teaching Computer Organization and Architecture......Page 714
A.1 Interactive Simulations......Page 715
A.3 Simulation Projects......Page 717
A.4 Assembly Language Projects......Page 718
A.7 Test Bank......Page 719
Appendix B: Assembly Language and Related Topics......Page 720
B.1 Assembly Language......Page 721
B.2 Assemblers......Page 729
B.3 Loading and Linking......Page 733
B.4 Recommended Reading......Page 741
B.5 Key Terms, Review Questions, and Problems......Page 742
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References......Page 756
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