Advances in Computer Systems Architecture: 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004. Proceedings

Front Matter....Pages -
Some Real Observations on Virtual Machines....Pages 1-1
Replica Victim Caching to Improve Reliability of In-Cache Replication....Pages 2-15
Efficient Victim Mechanism on Sector Cache Organization....Pages 16-29
Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy....Pages 30-43
Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures....Pages 44-57
A Configurable System-on-Chip Architecture for Embedded Devices....Pages 58-71
An Auto-adaptative Reconfigurable Architecture for the Control....Pages 72-87
Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory....Pages 88-101
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System....Pages 102-114
Architecture Design of a High-Performance 32-Bit Fixed-Point DSP....Pages 115-125
TengYue-1: A High Performance Embedded SoC....Pages 126-136
A Fault-Tolerant Single-Chip Multiprocessor....Pages 137-145
Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy....Pages 146-159
dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization....Pages 160-169
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption....Pages 170-184
Dynamic Reallocation of Functional Units in Superscalar Processors....Pages 185-198
Multiple-Dimension Scalable Adaptive Stream Architecture....Pages 199-211
Impact of Register-Cache Bandwidth Variation on Processor Performance....Pages 212-225
Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling....Pages 226-240
Continuous Adaptive Object-Code Re-optimization Framework....Pages 241-255
Initial Evaluation of a User-Level Device Driver Framework....Pages 256-269
A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To?....Pages 270-270
A Cost-Effective Supersampling for Full Scene AntiAliasing....Pages 271-281
A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2 m )....Pages 282-295
Scalable Design Framework for JPEG2000 System Architecture....Pages 296-308
Real-Time Three Dimensional Vision....Pages 309-320
A Router Architecture for QoS Capable Clusters....Pages 321-334
Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability....Pages 335-348
Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube....Pages 349-362
A Two-Level On-Chip Bus System Based on Multiplexers....Pages 363-372
Make Computers Cheaper and Simpler....Pages 373-373
A Low Power Branch Predictor to Selectively Access the BTB....Pages 374-384
Static Techniques to Improve Power Efficiency of Branch Predictors....Pages 385-398
Choice Predictor for Free....Pages 399-413
Performance Impact of Different Data Value Predictors....Pages 414-425
Heterogeneous Networks of Workstations....Pages 426-439
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays....Pages 440-448
Order Independent Transparency for Image Composition Parallel Rendering Machines....Pages 449-460
An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments....Pages 461-472
Validating Word-Oriented Processors for Bit and Multi-word Operations....Pages 473-488
Dynamic Fetch Engine for Simultaneous Multithreaded Processors....Pages 489-502
A Novel Rename Register Architecture and Performance Analysis....Pages 503-514
A New Hierarchy Cache Scheme Using RAM and Pagefile....Pages 515-526
An Object-Oriented Data Storage System on Network-Attached Object Devices....Pages 527-538
A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory....Pages 539-553
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking....Pages 554-567
A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel....Pages 568-581
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization....Pages 582-595
Back Matter....Pages -